Get RTLD building and relocating

There is no lazy relocations yet. Not all options are fully tested.
Add support for passing the environment to the kernel
Add the virtio options to the kernel config

This is needed for the Foundation Model
Fix the INVARIANTS build
Only set the readonly bit on valid pages.

We check if this is zero later which it wil not be if this bit is set.
Build ldexp.c for ldexp(3)
Add the needed defines for xlint
Create a few functions to help debug tlb issues

They use the at instruction to see the details of address translation.
Introduce basic support for ARM64 CPU affinity

CPU affinity fields declared in MPIDR_EL1 describe
four affinity levels for each CPU core in the system creating
unique CPU address: <Aff3>.<Aff2>.<Aff1>.<Aff0>
Introduce __cpu_affinity[] array indexed by CPU number as seen
by the system and accessor macro cpu_affinity().
Current implementation supports only single CPU cluster which means
that only Aff0 is expected to change whereas Aff3-Aff1 are expected
to stay unchanged.
Use already defined CPU functions and macros to extract pcpu pointer

Since there are get_mpidr() and CPU_AFF() we can use them
to minimize code redefinitons and link related data
structures for future development (SMP).
Add 64KB page definitions for ARM64
Introduce basic support for ARM Generic Interrupts Controller v3.0

- Enable GIC CPU interface access via system registers in locore.
  The necessary configuration is performed in EL2.
- Add preliminary GICv3 driver:
  - distributor, re-distributo and CPU interface configuration
  - basic interrupts handling (PPIs and SPIs only)

- Missing bits:
  - "redistributor-regions" support
  - SGI support
  - ITS
  - selected interrupt configuration (pic_config method)
Make efisimplefs debugs silent when not debugging
Add EARLY_UART_PA/VA to ARM/ARM64 options

This options are supposed to be used as a replacement for hard-coded
values of EARLY_PRINTF UART addresses. It is assumed that UART's
PA and VA may differ.
Add support for EARLY_PRINTF to PL011 UART

Adds early_putc routine for the driver. Requires EARLY_PRINTF and
EARLY_UART_VA defined and set to a reasonable value.
Appropriate mapping VA->PA ought to be created during early init stage
as well.
Use EARLY_PRINTF in a more generic way on ARM64

From now when EARLY_PRINTF option is defined,
the PA->VA mapping is created in locore.S for a 1GB
block containing UART registers. The addresses are taken from
EARLY_UART_PA/VA options, therefore they have to be defined and
specified to a correct value.
PL011-specific early_putc routine has been removed from
machdep.c since there is a dedicated one in PL011 driver.
Add initial support for Cavium Thunder PCIe root complex.

	- Parse Device Tree to get mem ranges.
	- Add API to read/write to PCIe configuration space.
	- Device mem mapping and BAR initialization incomplete.
	- MSI-X interrupt handling incomplete.
Fix some obvious mistakes in ARM PL011 UART

- Don't forget uart_barrier() on write.
- After disabling UART, wait for transmission to finish before
  changing control and line. Timeout and fail if something's wrong
  with the hardware.
- Check for break and overrun only on RX.
- Change masking of TXEMPTY interrupt to clearing it as this was
  the original intention.
Add CPU part name for Cavium Thunder

Name selected according to DTS description for "cpu" node.
Improve ARM64 CPU identification.

- Keep CPU description per-CPU (indexed by cpuid)
- Rework Implementer/PartNum relation
  - need to have separate PartNum tables for each implementer