merge d80020u onto caf
msm: mdss: implement overlay prepare ioctl

Overlay prepare will allow a full frame with multiple overlays to be
configured at once and perform frame level checks before being pushed to
display. This function guarantees that if the call is successful, the
frame can be displayed successfully on the screen when display commit is
called.

Change-Id: I276b6fe3e0a872a2e93170f3cea1002d3ce0dac9
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
Signed-off-by: Anusha Koduru <kanusha@codeaurora.org>
msm: display: Add pipe type selection in overlay request

Allow user to specify the type when requesting an overlay pipe.
If field is set the pipe type indication in the flags will be
ignored.
Change-Id: Iee51d24b96c7a2a987dc70a439342e6548dfc8fa
Signed-off-by: Vineet Bajaj <vbajaj@codeaurora.org>

Conflicts:
	drivers/video/msm/mdss/mdss_mdp_overlay.c
	include/linux/msm_mdp.h
msm: vidc: Bail out if ocmem allocation failed

We shouldn't need to call venus_hfi_set_ocmem if the allocation of ocmem
failed.

Change-Id: I805f914af4d340fd50beecdb63b87c4cbda19fb0
Signed-off-by: Deva Ramasubramanian <dramasub@codeaurora.org>
msm: vidc: add LTR support for video encoder

Enable LTR support for VP8 codec to add robust error resilience.

Change-Id: I3b87c5cdaef836a6d02d5b9fe71b7165b7f13581
Signed-off-by: Ashray Kulkarni <ashrayk@codeaurora.org>
msm: vidc: Add generic LTR mode support

Use generic LTR HFI APIs for h264 and vp8 formats.

Change-Id: I9f307046d7ec6de4eb6d43704686be902356882a
Signed-off-by: Ashray Kulkarni <ashrayk@codeaurora.org>
[media] v4l2: Add enum for frame level QP extra-data

This option is intended to be used to request as extra-data
the frame level QP.

Change-Id: Icaf88bd5a48ac394d1ed7ded8dc320cfeebc2765
Signed-off-by: Jorge Solano Altamirano <jsolano@codeaurora.org>
msm: vidc: Add support to request frame level QP information

The resulting QP information for H264 is the slice level
QP averaged over whole frame; for all other codecs its
frame level QP.

Change-Id: I288904b05d886c1e94fc113b8bd3fba5b13b48f3
Signed-off-by: Jorge Solano Altamirano <jsolano@codeaurora.org>
[media] v4l2: Add enums to request frame bits info as extra-data

This option is intended to be used to request as extra-data
the size in bits from frame header and frame itself.

Change-Id: I207045cda8c8038981bcf4548eb3d221502a67e1
Signed-off-by: Jorge Solano Altamirano <jsolano@codeaurora.org>
msm: vidc: Add support to request frame bits info as extra-data

Provides information regarding number of bits in the frame (i.e frame
size expressed in bits) & also the number of bits in frame header (i.e
frame header size expressed in bits).
Number of bits in header is reported as:
For H264, sum of all slice headers bits for all the slices in the frame.
For all other codecs, number of bits in the frame header.

Change-Id: I6caeca025ff0ce059a20891a6d657b47c4b452b3
Signed-off-by: Jorge Solano Altamirano <jsolano@codeaurora.org>
msm: vidc: Return meaningful information for extra-data plane

Sending meaningful information in the extra-data plane structure
instead of trashy values for some uninitialized fields.

Change-Id: I6d1a5debb801836f48e4cdbd6129b5086ec18a63
Signed-off-by: Jorge Solano Altamirano <jsolano@codeaurora.org>
msm: vidc: Add support for MBI extradata

Macro Block Information extradata (if enabled) allows interested
clients to query for metadata about each macroblock.

Change-Id: Icfee32770018338e28ae149e1ccb654f5a48cbec
Signed-off-by: Deva Ramasubramanian <dramasub@codeaurora.org>
msm: vidc: add control to enable Hierarchical P num layers

This change will enable firmware to perform Hierarchical
video encoding for P frames. Hierarchical video encoding is
used to improve error resilience and temporal scalability.
The encoded frames are logically organized in to multiple
layers with frames in one layer referencing only frames
from lower layers. The lowest layer, i.e. base layer, is
the only exception.

Change-Id: Ie30e6d075b76b3337ec895584cf1f3be9f4bb6c6
Signed-off-by: Arun Menon <avmenon@codeaurora.org>
msm: vidc: Provide qmenu for V4L2_CID_MPEG_VIDC_VIDEO_INTRA_REFRESH_MODE

The v4l2 control framework requires a qmenu containing a string
description of each menu item.

Change-Id: Id41fd794a6f7ad8711caf9d072975ad6cabad6f9
Signed-off-by: Deva Ramasubramanian <dramasub@codeaurora.org>
msm: vidc: Add description of LTR Extradata

The missing string descriptor caused a mismatch in array sizes
causing the v4l2 control framework make an out of bounds access.

Change-Id: I9a9f64e16ca95163d800702d94528833f5892537
Signed-off-by: Deva Ramasubramanian <dramasub@codeaurora.org>
msm: vidc: Query the core on VIDIOC_G_FMT

Previously we only queried the core for buffer requirements in
VIDIOC_REQBUFS, and relied on that information in _G_FMT.  However,
there's no expectation that the client calls _REQBUFS before _G_FMT,
which leads to stale information being returned as part of _G_FMT.

As such, always retreive fresh info from the core for either ioctl.

Change-Id: Ife94343f4bd4f62da7f2bef4266076ceed409bca
Signed-off-by: Deva Ramasubramanian <dramasub@codeaurora.org>
msm: kgsl: Enable protected mode for A3XX

Enable protected register mode for A3XX with these commits from
msm-3.10:

msm: kgsl: Enable protected register mode for A3XX
msm: kgsl: Print the register that causes a protected mode error
msm: kgsl: Unprotect the VBIF performance counters

Change-Id: Ic0dedbad950ffbd063fd861d9440bb5dce8d5fb1
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
msm: kgsl: Protect SMMU registers from being written by the GPU

Put the SMMU register range in protected mode to shield them from
IB1/IB2 writes from userspace.

CRs-Fixed: 599971
Change-Id: Ic0dedbad8c03fc1c54ff73221231e2440d3c34dd
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
msm: kgsl: Mark the IOMMU setstate memory as read only

Mark the IOMMU setstate memory as read only in the pagetable.

Change-Id: Ic0dedbadb19e499c749cd744c3e89be3bcb4c2a2
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
msm: kgsl: Protect CP_STATE_DEBUG_INDEX

Put CP_STATE_DEBUG_INDEX and CP_STATE_DEBUG_DATA under protection
to keep it from being written from an IB1. Doing so however opens
up a subtle "feature" in the microcode: memory read opcodes turn off
protected mode in the microcode to do the read and then turns it
back on regardless of the initial state. This is a problem if the
memory read happens while protected mode is turned off and then we
try to access a protected register which then complains and goes boom.

To account for this irregularity explicitly turn back off protected
mode in all the places where we know this will be a problem.

Change-Id: Ic0dedbad1397ca9b80132241ac006560a615e042
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>