PCI: imx6: fix boot hang when link already enabled

This fixes a boot hang observed when the bootloader
already enabled the PCIe link for it's own use. The
fundamental problem is that Freescale forgot to wire
up the core reset, so software doesn't have a sane way
to get the core into a defined state.

According to the DW PCIe core reference manual configuration
of the core may only happen when the LTSSM is disabled, so
this is one of the first things we need to do. Apparently
this isn't safe to do when the LTSSM is in any other state
than "detect" as we observe an instant machine hang when
trying to do so while the link is already up.

As a workaround force LTSSM into detect state right before
hitting the disable switch.

Reported-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Tim Harvey <tharvey@gateworks.com>
PCI: imx6: additional fix for boot hang when link already enabled

The upstream patch isn't enough for this kernel. The PCIe clock is not
enabled at this time for this kernel, so an access to dbi_base will hang.
To work around this, enable the clocks before we access dbi_base to force
the link down.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
PCI: imx6: fix occasional link failure

According to the IMX6 reference manuals, REF_SSP_EN (Reference clock enable
for SS function) must remain deasserted until the reference clock is running
at the appropriate frequency.

Without this patch we find a high link failure rate (>5%) on certain
IMX6 boards at various temperatures.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
imx: ventana: add GW5520 support

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
bt656: update to latest fsl patchset

This provides some fixes required for dual display for concurant HDMI + CVBS
out.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
mxc: output: use IC only when needed

revert: 914d808705b2dac9ae05d766bfd6c2b7a56bebe6

The updated fsl patch for support BT656/BT1120 resolve the issue causing
the IC to always be necessary and allowing it to be disabled when uneeded
will reduce overhead and power draw.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
imx/clk: fix ipu2_di0 clock for dual display HDMI+CVBS out

When both HDMI (digital) and CVBS (analog) video are active separate clocks
need to be used.

In addition for BT656 output (used by CVBS out) ensure that the clock is
rounded up appropriately for 27MHz to work around a clock config issue still
under investigation.

This allows concurant HDMI and CVBS output.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>