msm: bam_dmux: tune downlink polling parameters

This change disables the BAM DMUX adaptive timer - this is to address
concerns about drops in TCP throughput for some use cases with the timer
enabled.  It also sets the aggregation to 3ms to save power while not
compromising performance. Power tests show a savings of 3-4% (compared to
having the timer poll the BAM pipe every 1 ms) for LTE (40Mbps downlink and
25Mbps uplink) and HSPA (7Mbps downlink and 384Kbps uplink) with no
degradation in performance.

Change-Id: Ia51eae773723e60d8b051766ad80bfb0a16f5f6d
Signed-off-by: Anurag Singh <anursing@codeaurora.org>
msm: bam_dmux: add loopback support

Bam dmux is currently very difficult to isolate and provide measurements
for common metrics, such as throughput and latency.

Add hooks into bam_dmux to allow for a seperate dynamically
loadable loopback module. This allows bam dmux to be isolated, and to
provide more accurate measurements of the above metrics.

Change-Id: I174d900dea73cca27d32a54a908f43728059be30
Signed-off-by: Brent Hronik <bhronik@codeaurora.org>
msm: bam_dmux: Fix race condition during SSR

BAM DMUX drivers set the global flags to identify the SSR during
SUBSYS_BEFORE_SHUTDOWN notification, but the flags change is not reflected
in some code paths like msm_bam_dmux_write().

Add the SSR flag check and SRCU locking to complete all pending bam dmux
writes before returning the control in SSR call back function for
SUBSYS_BEFORE_SHUTDOWN notification.

CRs-Fixed: 584805
Change-Id: I26647b485977943f272c44f7450ed6c4a4aa62f3
Signed-off-by: Arun Kumar Neelakantam <aneela@codeaurora.org>
msm: bam_dmux: modify DL low memory algorithm

Bam_dmux maintains a pool of dynamically allocated buffers for the BAM DMA
engine to use as destination memory for Downlink (DL) data.  The allocation
requests for the buffers are done using flags to indicate delays are
tolerable and either the memory or an error should be returned immediately
to bam_dmux as the buffers are normally allocated within various hot paths
inside of the driver.  If a low memory allocation failure is encountered
when attempting to replenish the pool of buffers, bam_dmux will either
attempt the memory allocations later when the next scheduled pool refilling
occurs if there is at least one buffer remaining in the pool, or will
schedule a delayed task to retry the buffer allocation until atleast one
buffer can be put into the pool.

This mechanism of handling low memory situations has two flaws.  First, the
allocation type used by bam_dmux does not trigger the standard low memory
recovery mechanism within the memory management subsystem.  Second, the
peripeheral on the otherside do the DMA engine has a limited hardware based
flow control mechanism that will not release flow control with only one
buffer queued to the DMA engine.

To assist in system recovery, and avoid a data stall, create a cold path
that is tolerant of memory allocation delays and is triggered when the hot
path encounters an allocation failure.

CRs-Fixed: 589665
Change-Id: If72b0eaef285ac6dfd99e97bef1cd7df154e3a48
Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org>
msm: watchdog-v2: use request_mem_region instead of request_region

Use request_mem_region api to request for allocating io resource in place
of request_region since the resource is actually not an io port resource
but io memory.

Change-Id: Iddb279466495e34aa469dabaa134a209db2e21ea
Signed-off-by: Aparna Das <adas@codeaurora.org>
msm_rq_stats: massive overhaul to calculate more effeciently
Signed-off-by: renderbroken <zkennedy87@gmail.com>
msm: acpuclock: Fix acpuclk_get_rate

acpuclk_get_rate() is broken, quick fix it by returning msm_cpufreq_get_freq
to avoid regressions.
msm: lpm: remove redundant assignment

Removed the redundant cpu level is assignment.

Change-Id: I1aecc4f3d1eb55cd9e057c82f63b8f145401c0fc
Signed-off-by: Venkat Devarasetty <vdevaras@codeaurora.org>
msm: lpm_levels: return new idle level to cpuidle framework

Need to return the new idle level to cpuidle framework
but just returned input value argument 'index' which is
not used actually at lpm_cpu_power_select().

CRs-fixed: 601636
Change-Id: Iabd182eeb4fbdc67f4e07b40a1b593471cf8cbdf
Signed-off-by: Anil kumar mamidala <amami@codeaurora.org>
msm: lpm_levels: remove rpm handshake in l2_gdhs mode

Remove rpm handshake in l2_gdhs mode and adjust the
latency values for l2_gdhs mode. Add a new dt entry to
inform lpm_levels driver to send sleep votes to rpm.

CRs-fixed: 604873
Change-Id: I9eeae5fada4f84ee2ca2eb9d67707dee1adf56ac
Signed-off-by: Anil kumar mamidala <amami@codeaurora.org>
msm: lpm_levels: fix incorrect mode select with next event time

Based on the next event timer value the best power mode will get
selected but there is a mismatch in calculation of selecting
the best mode. This change will fix that and selects the correct
mode based on the next wakeup time.

CRs-fixed: 611794
Change-Id: I31270e62b04e7a97afa1c9b0c45069ad82d1a9b0
Signed-off-by: Anil kumar mamidala <amami@codeaurora.org>
msm: lpm_levels: update suspend stats counters and time

suspend stats in the debug pm stats are not getting updated as
suspend stats in the suspend wake path is missing. This change
will add and update the suspend stats in the suspend wake path.

CRs-fixed: 536881
Change-Id: I3b47511afb75926e51e82fc83929f405404fbf07
Signed-off-by: Anil kumar mamidala <amami@codeaurora.org>
msm: lpm_levels: Fix incorrect computation of next wakeup time

The next event timer wakeup was incorrectly computed when the hard timer
event doesn't exist. Fix by ensuring the next wakeup is computed only
when a timer event is valid

Change-Id: I40c1f372f84d8f43b2101e37dcfb592193d4b2e0
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
msm: msm-pm: Remove timeout waiting for cpu to power collapse

The delays in the CPU_DYING notication path could result in the core
initiating the hotplug to send out CPU_DEAD notifications after
msm_pm_wait_cpu_shutdown() times out. This could result in a unknown
resets when regulator/clocks are disabled in the CPU_DEAD path. To
prevent unknown resets, wait infinitely to enter power collapse but
throw a warning after the 1ms mark.

The platform_cpu_kill() path is also executed in the reboot path when a
core tries to stop secondary cores. In these cases, platform_cpu_kill
shouldn't wait infinitely for the secondary cores to power collapse. To
circumvent this scenario, track dying cpus as a part of the hotplug
notification and skip waiting for the core to power collpase during
reboot path.

Change-Id: I6a7fbeeea0d50b5f1fc76a02a39f161b40a67b6c
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
msm: pm: Notify secure code of L2 power mode from last core only

Notify secure code L2 low power mode only if the current core is the
last core down. In certain scenarios, its possible that Linux and
secure code have different views of what a last core and could result in
secure code not invalidating a cache when the L2 was placed in a
non-retention mode.

Consider a two core scenario where Core 1 is power collapsed and Core 0
is the last core down setting L2 to be invalidated. Before Core 0 makes
the scm call, its possible that is interrupted to process a secure
interrupt. If the Core 1 wakes up in this time and decides to vote a
different L2 mode, this mode wouldn't be consistent with what Core 0
passes down to secure code when resuming from interrupt handling. In
these cases, the secure code could end up incorrectly invalidating the L2
on warmboot.

Also, the secure code and Linux should have a consistent view of what
last core down is to flush and invalidate L2. To ensure this, acquire a
remote (hardware) spinlock to serialize the last portion of the
power-collapse sequence. The remote spinlock will be released by the
secure code after it acquires its own lock to serialize the power
collapse sequence.

Change-Id: Ib5e2f360fddce558d22ce094dd7755c395c45a8c
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
msm: pm: Acquire scm_handoff_lock conditionally

Acquisition of the scm_handoff_lock requires a TrustZone software
image that will release the lock. Without this, a deadlock will
occur since the lock will remain held forever.

Since this lock is only really needed if the qcom,allow-synced-levels
property is specified for the lpm-levels device, conditionally acquire
the lock based on this property. This avoid the TrustZone software
dependency when qcom,allow-synced-levels is not specified.

Change-Id: I8f8f1e4f9bdab6e70ef2a5484faba4e8ce8ac20c
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>

Conflicts:
	arch/arm/boot/dts/msm8974-v2-pm.dtsi
msm: pm: print active clocks before entering into pc

print out all active clocks during idle power collapse
and suspend power collapse using clock debug API

CRs-fixed: 596828
Change-Id: Ie653c02d490b80de001f61fe8320ee851bb139c7
Signed-off-by: Anil kumar mamidala <amami@codeaurora.org>
msm: pm: bug in pc debug counters logic

The logic to find the location to add debug counter
for a CPU is incorrect and due to this the counter
of next CPU is corrupted. The logic is updated to
correct this.

CRs-fixed: 596773
Change-Id: I6de21bd480720d80ad9801d8a1331b6faf689b95
Signed-off-by: Anil kumar mamidala <amami@codeaurora.org>
msm: msm-pm: Remove outer cache functions

Remove outer cache functions to do cache maintenance
operations because all the newer targets having the
integrated cache controller and cache operations are
done by standard cache maintenance functions.

[myfluxi: Adapt to 8974/hammerhead]

Change-Id: Iaeaf5bc85ea629b89efabb1d3ea8cc9aa97f9790
Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>
msm: pm: Remove redundant cpu_init API

cpu_init() API setup the per-CPU stacks after cores
comes out of the low power modes. This API is not
needed after the PM driver start using the standard
ARM suspend/resume framework.

Change-Id: Ic384165e4fbc289c8338c66ebac1bb0d2bfadf8b
Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>