ENGR00274761-1 Upgrade VPU driver for Linux 3.10 kernel

Pick files from origin/imx_3.5.7 commit 135bf02a0727ea5ce96
- mxc_vpu.h is picked from arch/arm/plat-mxc/include/mach/
  and put to include/linux/
- drivers/mxc/vpu/Kconfig
- drivers/mxc/vpu/Makefile
- drivers/mxc/vpu/mxc_vpu.c

Signed-off-by: Hongzhang Yang <Hongzhang.Yang@freescale.com>
ENGR00274761-2 Upgrade VPU driver for Linux 3.10 kernel

Add VPU node in dtsi
- Add VPU node (common part) in imx6qdl.dtsi. It was defined
  in imx6.dtsi in Linux 3.5.7.
- Add "iram" property for gen_pool api callings
- Add "resets" property for device_reset api calling
- Add VPU node (soc specific part) in imx6q.dtsi and imx6dl.dtsi

Signed-off-by: Hongzhang Yang <Hongzhang.Yang@freescale.com>
ENGR00274761-3 Upgrade VPU driver for Linux 3.10 kernel

Modify mxc_vpu.c to adapt to kernel 3.10 change
- Remove all references to header files in mach folder
- Include linux/clk.h instead of mach/clock.h
- Call device_reset instead of imx_src_reset_vpu
- Dummy PU and PM api callings before they are ready
- Dummy cpu_is_mx5? api callings
- Remove VM_RESERVED flags
- Call gen_pool instead of iram_alloc

Modify mxc_vpu.h
- Change CONFIG_ARCH_MX6 to CONFIG_SOC_IMX6Q

Modify Kconfig:
- Change ARCH_MX? to SOC_IMX?, remove ARCH_MX3/ARCH_MX37
  because for MX3 series only SOC_IMX31 and SOC_IMX35 are
  defined in Linux 3.10, and these chips don't have VPU.
  Need to add SOC_IMX37 to VPU Kconfig if MX37 could be
  supported later.

Add VPU to config and build path
- mxc/Kconfig
- mxc/Makefile

Signed-off-by: Hongzhang Yang <Hongzhang.Yang@freescale.com>
ENGR00274386-1 ASoC: imx-wm8962: Fix 192KHz playback slow issue

We are using auto sample rate feature of WM8962, whereas it doesn't
support those sample rates bigger than 96KHz, 192Khz for example,
so 384 * samplerate would be too big for it to handle. When playing
192KHz 24bit wav file, the playback would be slower than normal.

Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
ENGR00274386-2 ASoC: imx-wm8962: Set MCLK source clock to 0Hz in hw_free()

When DAPM closed WM8962 after playback, its driver would prompt
'wm8962 0-001a: Unsupported sysclk ratio 500' due to the invalid
divisor calculated by WM8962 codec driver.

To fix it, we can work around by setting its MCLK source to 0Hz,
so the codec driver would never get an invalid divisor any more.
Since hw_params() would re-set the MCLK source, no need to worry
about any side-effect.

Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
ENGR00269945: ARM: imx: add soc revision helper functions

Similar to what we do for cpu type, the patch adds helper functions
imx_set_soc_revision() and imx_get_soc_revision() to maintain
imx_soc_revision in cpu.c.

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
ENGR00269945: ARM: imx6qdl: use common soc revision helpers

It calls imx_set_soc_revision() to set up soc revision in
imx6q_init_revision(), and replaces all the occurrences imx6q_revision()
and imx6dl_revision() with common helper imx_get_soc_revision().

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
ENGR00269945: ARM: imx6qdl: add a common function to initialize revision from anatop

The patch creates a common function imx_init_revision_from_anatop() by
merging imx6q_init_revision() and imx_anatop_get_digprog(), so that any
SoC that encodes revision info in anatop can use it to initialize
revision.

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
ENGR00269945: ARM: imx: use imx_init_revision_from_anatop() on imx6sl

Add imx6sl support into imx_init_revision_from_anatop(), so that it can
be used to initialize cpu type and revision on imx6sl.

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
ENGR00269945: ARM: imx6: report soc info via soc device

The patch enables soc bus infrastructure and adds a function
imx_soc_device_init() to report soc info via soc device interface for
imx6qdl and imx6sl.  With the support, user space can get soc related
info by looking at sysfs like below.

  $ cat /sys/devices/soc0/machine
  Freescale i.MX6 Quad SABRE Smart Device Board
  $ cat /sys/devices/soc0/family
  Freescale i.MX
  $ cat /sys/devices/soc0/soc_id
  i.MX6Q
  $ cat /sys/devices/soc0/revision
  1.2

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
pinctrl: imx: work around select input quirk

The select input for some pin may not be implemented using the regular
select input register but the general purpose register.  A real example
is that imx6q designers found the select input for USB OTG ID pin is
missing at the very late stage, and can not add a new select input
register but have to use a general purpose register bit to implement it.

The patch adds a workaround for such select input quirk by interpreting
the input_val cell of pin function ID in a different way, so that all
the info that needed for setting up select input bits in general purpose
register could be decoded from there.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
ARM: dts: imx6q: add quirky select input for USB_OTG_ID

For some reason, the select input of pin function USB_OTG_ID is not
implemented via a regular select input register but using the bit
USB_OTG_ID_ SEL (shift 13) of IOMUXC_GPR1 register (offset 0x4).

As per the workaround for such quirk implemented in pinctrl driver,
we need to compose the input_val cell as below.

	31     23      15      7        0
	| 0xff | shift | width | select |

Thus, we have 0xff0d0100 for MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID and
0xff0d0101 for MX6QDL_PAD_GPIO_1__USB_OTG_ID in input_val cell.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Peter Chen <peter.chen@freescale.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
ENGR00274473-1 regulator: add more notifier events

Some hardware modules need strict flows according
to regulator's enable/disable, such as for i.MX6
SOC's PU regulator, there is another power gate
in GPC module, it needs to disable PU modules' clock
before PU regulator is disabled and need to enable
clock right after PU regulator is enabled, then it
can do GPC's power gate operation.

So we need to add REGULATOR_EVENT_PRE_DISABLE and
REGULATOR_EVENT_ENABLE for regulator's notifier events.

Signed-off-by: Anson Huang <b20788@freescale.com>
ENGR00274473-2 regulator: anatop: implement more callback

Need to support anatop PU regulator on/off dynamically,
so we need to add enable/disable/is_enabled/enable_time
for anatop regulator.

Only PU regulator in anatop can support dynamical on/off,
so this implement is only for PU regulator, other regulators
are always on.

Signed-off-by: Anson Huang <b20788@freescale.com>
ENGR00274473-3 ARM: dts: imx6qdl: remove PU LDO always-on attribute

PU regulator can be turned off when there is no PU module
running, so remove always-on attribute.

Signed-off-by: Anson Huang <b20788@freescale.com>
ENGR00274473-4 mxc: gpu-viv: support regulator on/off

Support PU regulator dynamical on/off on kernel v3.10.

Acked-by: Jason Liu
Signed-off-by: Anson Huang <b20788@freescale.com>
ENGR00274473-5 ARM: imx: Support PU regulator on/off dynamically

1. Change GPC to platform driver to support regulator nofication
in order to implement dynamical PU regulator on/off;

2. Remove previous enabling PU regulator during kernel boot up,
PU modules will handle it.

3. Support dynamical PU regulator on/off according to regulator
notification.

Signed-off-by: Anson Huang <b20788@freescale.com>
ENGR00274473-6 ARM: dts: imx6qdl: pass clocks and regulator to gpc

Now that gpc module is a platform driver, pass related
clocks and regulator from dts.

Signed-off-by: Anson Huang <b20788@freescale.com>
ENGR00274026 MX6 Clock: Replace imx_clk_mux2 function with imx_clk_mux_flags

The function of imx_clk_mux2 is cover by imx_clk_mux_flags.
Remove imx_clk_mux2 and replace with imx_clk_mux_flags function.

Signed-off-by: Sandor Yu <R01008@freescale.com>
ENGR00274031 MX6: Move HDMI core menu into multifunction device drivers

Move MX6 HDMI core driver menu into Multifunction device drivers menu

Signed-off-by: Sandor Yu <R01008@freescale.com>