ARM64: convert fp16 narrowing ISel to pseudo-instruction

The previous attempt was fine with optimisations, but was actually rather
cavalier with its types. When compiled at -O0, it produced invalid COPY
MachineInstrs.
ARM64: make sure first argument to INSERT_SUBVECTOR has right type.

Again, coalescing and other optimisations swiftly made the MachineInstrs
consistent again, but when compiled at -O0 a bad INSERT_SUBREGISTER was
produced.
SLPVectorizer: compare entire intrinsic for SLP compatibility.

Some Intrinsics are overloaded to the extent that return type equality (all
that's been checked up to now) does not guarantee that the arguments are the
same. In these cases SLP vectorizer should not recurse into the operands, which
can be achieved by comparing them as "Function *" rather than simply the ID.
ARM64: fix lowering of fp128 fptosi/fptoui

We were creating libcall nodes that returned an MVT::f128, when these
particular operations actually return an int of some stripe.
ARM64: use GOT for weak symbols & PIC.

Weak symbols cannot use the small code model's usual ADRP sequences since the
instruction simply may not be able to encode a value of 0.

This redirects them to use the GOT, which hopefully linkers are able to cope
with even in the static relocation model.