Revert "Merge "kconfig: fix IS_ENABLED to not require all options to be defined""

This reverts commit 79c23e99356ee8b24acd26420d68a23f1d511dcb, reversing
changes made to fb1d5809edb5c4b55e6d7c34241e82a04b42f1ac.
Revert "kconfig: Introduce IS_ENABLED(), IS_BUILTIN() and IS_MODULE()"

This reverts commit 7e788d9fd1eaf0594247b510df1bafd3ec435d5b.
diag: Fix various issues with IOCTLs

DIAG kernel driver interacts with user space processes using
IOCTLS. Some issues, such as potential integer over/underflow,
incorrect buffer copy etc were identified in these functions.
This change fixes them.

Fix for the following CVE-
CVE#1 CVE-2012-4220
CVE#2 CVE-2012-4221

CRs-Fixed: 385352, 385349
Change-Id: Ie37dbda0acdc63fb440bd81d7f57c146f314b91a
Signed-off-by: Dixon Peterson <dixonp@codeaurora.org>
msm:vidc: Amend error checks on ION API failures

This change will validate the ION API failures
to fix target freeze issues.

CRs-fixed: 412958
Signed-off-by: Maheshwar Ajja <majja@codeaurora.org>
(cherry picked from commit 31bb7dc8e3a4d01262727349b30bb3007fd474bd)

Conflicts:

	drivers/video/msm/vidc/720p/ddl/vcd_ddl_utils.c
	drivers/video/msm/vidc/common/vcd/vcd_sub.c

Change-Id: I6d0dc8afef6ba1513c2ea29753f7df6b1a3d70e9
Signed-off-by: Srivalli Oguri <oguri@codeaurora.org>
msm_serial_hs_hwreg.h: Correcting the even parity and odd parity bits

Currently parity bits are defined to be used with UART_DM_MR2
register with PARITY_MODE Bit as below :
EVEN_PARTIY = 1 and ODD_PARITY = 2
With these values, UART functionality doesn't work after enabling parity.
Hence adding correct used PARITY_MODE bits value as
EVEN_PARITY = 2 and ODD_PARITY = 1
after confirming with UART hardware programming guide.

CRs-Fixed: 410377
Signed-off-by: Saket Saurabh <ssaurabh@codeaurora.org>
(cherry picked from commit fd40e5f6313fbc74e8897927be1004faa5d9df08)

Change-Id: Ia7461d1983336b1d965498ede00001cc67c1d925
Signed-off-by: Ramakrishna Prasad N <crpn@codeaurora.org>
msm_fb: display: return fail if pipe still staged

Pipe is not un-staged from mixer when it is unset.
It expects a pan_display() to un-stage it out of mixer.
Return fail at overlay_set() if pipe was still stage
at mixer.

(cherry picked from commit 4fc9350b124ded06f90c43410c2c0b512681c0db)

Change-Id: I49f0ab340e1d3930fc8e279743e8749e6f0d5726
CRs-fixed: 399193, 393979
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
defconfig: fsm9xxx: Enable perf_events and sctp

FSM targets needs PERF events enabled for performance
analysis using PMU

Acked-by: Kaushik Sikdar <ksikdar@qti.qualcomm.com>
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
(cherry picked from commit a1627f8a766a9d6fa1b3184ea26a47ff9b0dd6de)

Change-Id: Ic38c38d1001e5bd48ce600dc3c3cb407153998f9
Signed-off-by: Gopal Goberu <ggober@codeaurora.org>
msm_fb: Handle vsync interrupt properly on MDP 3.03 targets

Handle enabling/disabling the vsync interrupt and mdp clock
enabling/disabling in a better way on MDP 3.03 targets. This
will avoid target crashes due to unclocked register access.

CRs-fixed: 388751
Change-Id: I5c4a409772464ce7d06869374dcba5ad7e335955
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>

Conflicts:

	drivers/video/msm/mdp.c

Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>
msm_fb: Return ioctl on vsync interrupt disable

Before the vsync interrupt gets disabled, initialize the completion
structure and then disable the interrupt. This enables the ioctl to
return successfully in all the cases.

Change-Id: I6a7c233f818a773d00497502213d1ecf8fe9dc24
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
msm_fb: Make Vsync IOCTL during disable sequence as NO WAIT

Change to make the vsync IOCTL no wait during the disable sequence.
This is to increase the performance. Handle the synchronization of
vsync interrupt using state variables in drivers from now.

Change-Id: Ia5ec14493f233a95f21d01ea627200a6c278239f
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
msm_fb: Return pan_display call on Vsync interrupt

Till now, the pan_display call returns on DMA_P_DONE interrupt.
For command mode panels, the DMA transfer starts only after the
DMA engine receives a TE signal from the panel. Hence, return
pan_display ioctl on vsync interrupt to improve performance.
We still wait if the previous DMA transfer is not finished at
the beginning of next pan_display.

Change-Id: Ie92bc000a5842aa02a77a08b6bafdc8472bbebbd
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>

Conflicts:

	drivers/video/msm/mdp.c
	drivers/video/msm/mdp_dma.c

Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>

Conflicts:

	drivers/video/msm/mdp.c

Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>
msm_fb: display: Send vsync events using sysfs for MDP3 targets

Replace sending of vsync timestamp using uevents with sysfs entry
as uevent result in increase in power numbers due to broadcast in
nature.

Change-Id: I22cfbd68c8bcbe4a47e94074393f1cbf79920c58
Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>

Conflicts:

	drivers/video/msm/mdp.c

Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>
msm_fb: display: Send vsync events using sysfs for MDP4 targets

Replace sending of vsync timestamp using uevents with sysfs entry
as uevent result in increase in power numbers due to broadcast in
nature. Also, for smart panel, wait4vsync is removed.

Change-Id: I5219e85b837b8bab9d00a9f40c1048d2a2355194
Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>

Conflicts:

	drivers/video/msm/mdp4_overlay_dtv.c

Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>
msm_fb: display: Make sysfs read request interruptible

Change blocking sysfs read request to be interruptible and protect
vsync timestamp value to prevent corruption.

Change-Id: I510d84134b0ab70d17729e8c53c91fa926035142
Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>
msm_fb : Add timeout while waiting for vsync event

Avoid eternal wait for vsync event when client tries to
read the corresponding sysfs entry. This will avoid hangs when
client tries to read in corner cases where the Timing
Generator or the clock or IRQ gets disabled.

CRs-fixed: 406752
Change-Id: I773687220b868823a9e4bfdae74361ee6487c5c6
Signed-off-by: Pradeep Jilagam <pjilagam@codeaurora.org>
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>

Conflicts:

	drivers/video/msm/mdp4_overlay_dtv.c

Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>
msm_fb: display: Create sysfs entries in mdp_probe for MDP4 targets

vsync sysfs entries should be created in mdp_probe instead of
creating in panel on. This avoids waiting for the first event
control in framework

Change-Id: I983731481ea89bb7666be5f2a9f75a1e04fd963f
Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>

Conflicts:

	drivers/video/msm/mdp4_overlay_dsi_cmd.c
	drivers/video/msm/mdp4_overlay_dtv.c
	drivers/video/msm/msm_fb.h

Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>
msm_fb: display: Create sysfs entries in mdp_probe for MDP3 targets

vsync sysfs entries should be created in mdp_probe instead of
creating in panel on. This avoids waiting for the first event
control in framework

Change-Id: I18b05b8d2a65d489afc6e3274ec8dc7a5b9a5f9a
Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>
msm: clock-local: Check for NULL branch ctl_reg

Branch clocks will soon be used for reset-only purposes, in which
case the ctl_reg field will be NULL. Update the handoff and
clk_disable code to check for a NULL register address before
reading the register.

Change-Id: I0a674409d6742cb2b03f972465bc80d15afc8664
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
msm: clock-8960: Move DSI resets functionality to their own clocks

The DSI core resets are currently associated with the DSI byte clocks
because the DSI core clocks are managed by the DSI driver directly,
not the clock driver. Move the reset functionality out of the byte
and into their own reset-only branch clocks so that the footswitch
driver, which needs to assert these resets, can do so without
involving the unrelated byte clock.

Change-Id: I65a84e97181c5461c5f2e0b0af19dc6b0b1d2557
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
msm: footswitch-8x60: Reset DSI domain along with MDP collapse/restore

Some DSI-related logic lives in MDP's collapsible GDHS domain for
896 and 8064. Assert the reset to this domain when the reset of MDP
is reset. Use of the reset-only clocks added here assumes the
display driver is making sure the DSI clocks (not managed by the
clock driver) are enabled for the duration of the collapse and
restore sequences so that the resets propagate.

Change-Id: Ife1b13e22e35b322ff5da75280b3c8d9d5027743
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>