arm: support V8 as a mode for A32 encodings
arm: use lowercase for special registers
arm: lowercase for apsr_nzcv
arm: printAddrMode5Operand() is wrong on calculating subtracted variable
arm64: print immediate in hexa for binary bitwise arith instructions: AND/ORR/EOR/TST
arm: print floating point number in %e format
suite: fix inputs in MC/
suite: update test_mc.py to better handle output of different formats of MC & CS
arm: support new mode CS_MODE_V8 for Armv8 A32 encodings
Merge branch 'next' of https://github.com/aquynh/capstone into next