mesa/cs: Implement MAX_COMPUTE_WORK_GROUP_SIZE constant.

v2: Document that the 3-element array MaxComputeWorkGroupSize is
indexed by dimension.
mesa/cs: Implement MAX_COMPUTE_WORK_GROUP_INVOCATIONS constant.
mesa/cs: Implement MAX_COMPUTE_WORK_GROUP_COUNT constant.

v2: Document that the 3-element array MaxComputeWorkGroupCount is
indexed by dimension.
glsl/cs: Handle compute shader local_size_{x,y,z} declaration.
mesa/cs: Handle compute shader local size during linking.
main/cs: Implement query for COMPUTE_WORK_GROUP_SIZE.
glsl/cs: Prohibit user-defined ins/outs in compute shaders.
glsl/cs: Prohibit mixing of compute and non-compute shaders.

Fixes piglit test:
spec/ARB_compute_shader/linker/mix_compute_and_non_compute
i965/cs: Create the brw_compute_program struct, and the code to initialize it.
i965/cs: Allow ARB_compute_shader to be enabled via env var.

This will allow testing of compute shader functionality before it is
completed.

To enable ARB_compute_shader functionality in the i965 driver, set
INTEL_COMPUTE_SHADER=1.
======= More ARB_compute_shader work =======
main: Clean up a strange construction in use_shader_program().
main: Change the type argument of use_shader_program() to gl_shader_stage.

This allows it to be called from a loop.
mesa/cs: Add DispatchCompute() to driver function table.
main/cs: Implement front end code for glDispatchCompute().
i965: Create a macro for setting a dirty bit.

This will make it easier to extend dirty bit handling to support
compute shaders.
i965: Create a macro for setting all dirty bits.

This will make it easier to extend dirty bit handling to support
compute shaders.
i965: Create a macro for checking a dirty bit.

This will make it easier to extend dirty bit handling to support
compute shaders.
i965: Modify dirty bit handling to support 2 pipelines.

The hardware state for compute shaders is almost entirely orthogonal
to the hardware state for 3D rendering.  To avoid sending unnecessary
state to the hardware, we'll need to have a separate set of state
atoms for the compute pipeline and the 3D pipeline.  That means we
need to maintain two separate sets of dirty bits to determine which
state atoms need to be run.

But the dirty bits are not completely independent; for example, if
BRW_NEW_SURFACES is flagged while doing 3D rendering, then not only do
we need to re-run 3D state atoms that depend on BRW_NEW_SURFACES, but
we also need to re-run compute state atoms that depend on
BRW_NEW_SURFACES.  But we'll also need to re-run those state atoms the
next time the compute pipeline is run.

To accomplish this, we record two sets of dirty bits, one for each
pipeline.  When bits are dirtied (via SET_DIRTY_BIT() or
SET_DIRTY_ALL()) we set them to the dirty state in both pipelines.
When brw_state_upload() is run, we clear the dirty bits just for the
pipeline that was run.

Note that since the number of pipelines is known at compile time to be
2, the compiler should unroll the loops in SET_DIRTY_BIT() and
SET_DIRTY_ALL().
i965: Modify state upload to allow 2 different sets of state atoms.

The set of state atoms for compute shaders is currently empty; it will
be filled in by future patches.