Added ethmac from OpenCores
Fix core file syntax in some core files

Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Merge pull request #27 from fjullien/fix

Fix core file syntax in some core files
disable i2c and spi; shorten reset pulse
found that JTAG module needs to be present
fix uart instantation problem
getting opencd to work
adding uart decoder
Merge branch 'master' of https://github.com/jjts/orpsoc-cores
uart decoder for testbench
Changing ID CODES only:

	modified:   cores/jtag_tap/rtl/verilog/tap_defines.v
	modified:   cores/jtag_tap/rtl/verilog/tap_top.v
	new file:   cores/jtag_vpi/bench/include/tap_defines.v
	modified:   cores/jtag_vpi/jtag_vpi.core

New module: SystemC version of jtag_vpi so that Verilator can be used
	modified:   systems/or1200-generic/bench/verilator/JtagServerSC.cpp
	modified:   systems/or1200-generic/bench/verilator/JtagServerSC.h
	modified:   systems/or1200-generic/bench/verilator/OrpsocMain.cpp
Signing Jose T. de Sousa in header
wb_intercon: add wb_data_resize when slave's datawidth != 32

Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
jtag server, corrections to cores, and orpsoc-defines.v
changed uart pins and replaced morkxx with or1200
merge with remote
trying to get it to work on the de0 nano board
towards icarus simulation
more files to for the de0_nano_sim system
deleting spurious file