[FEATURE] Add Quartus and Qsys project for Antares Interface

- Add MN pcp subsystem
- Add 256kx16 SRAM (tri-state-bridge)
- Add openMAC for single phy
- Add EPCS ipcore for M25P16 flash
- Add PCIe
- Add 125 MHz PLL output
- Add DPRAM for common memory
- Add pipeline bridge
- Connect PCIe with SRAM via pipeline bridge
- Separate reset interconnect for PCIe and Nios II / peripherals

Change-Id: I693fab99bd3628d3f1dfef111f40259f1e73b617
[FIX] Remove JTAG cable parameter from Antares interface

Since there is only one JTAG cable necessary for using the APC2100 with
Antares interface the JTAG cable parameter can be removed from the
board.settings file.

Change-Id: I1e0f328afa1d7d087429288bd2e6aeb27b108948
[FEATURE] Add signal tap for pcp and host benchmarks

- Add 1 MHz clock for acquisition
- Add signal tap instance

Change-Id: Id25cf03286392d4dff64bd0dd08d25fcfc2cb28f
[TASK] Add Nios II reset request port to Antares interface

Change-Id: I54bbbf3fff9158ccb2320f82c4e64755b7c12280
TODO: Connect with GPIO which is controlled by host.