Fixed taps to coincide with CHDL updates.
Basic load store queue implementation
added description of LSU
added to dos: bypasses to shorten minimum load latency to just memory latency
more modifications to funcunit.h
fixed baseline LSQ
fixed ldq bypass. stq also works now.
replaced TAP with DBGTAP
added external interface to lsq
fixed a bug in the debug memory interface
Added "has predicate" input to branch predictor.
Now pc_d is actually the PC of the decode stage.
Merge branch 'master' into simt