llvmpipe: get rid of impossible code in alloc_image_data

Only used for non display target resources.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
llvmpipe: integrate memory allocation into llvmpipe_texture_layout

Seems pointless to just duplicate some of the calculations (the calculation
of actual memory used compared to what was predicted in llvmpipe_texture_layout
actually could have differed slightly in some cases due to different alignment
rules used though this should have been of no consequence).

v2: keep the previous mip alignment of MAX2(64, cacheline). This was added for
ARB_map_buffer_alignment - I'm not convinced it's needed for textures, but
it was supposed to be cleanup without functional change. Also replace div
with 64bit mul / comparison.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
llvmpipe: don't store number of layers per level

This could be recalculated, though it turns out the only use of it after
resource allocation is for calculating whole resource size (for scene size
accounting though that isn't quite ideal neither). Thus, instead just store
the whole resource size and drop it (saving a couple bytes of storage per
resource). It makes things simpler too. Note that for the accounting winsys
resources always come back with size 0 but this is unchanged (we don't actually
know the size in any case).
Also reformat llvmpipe_texture_layout (drop unneded indentation).

v2: adapt to previous changes.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
define GL_OES_standard_derivatives if extension is supported

Define the macro GL_OES_standard_derivatives as 1 if the extension
GL_OES_standard_derivatives is supported.

V2 [Chris]: Correct trailing whitespace

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
i965/blorp: Don't set min_mag_neq bit in Gen6 SAMPLER_STATE.

The "Min/Mag State Not Equal" bit is supposed to be set when the min/mag
filters or address rounding modes differ.  BLORP uses identical min/mag
settings, so the bit should be unset.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
i965: Rename brw_wm_sampler_state.c to brw_sampler_state.c.

When the driver was originally written, it only supported texturing in
the pixel shader backend; vertex and geometry shader texturing came much
later.  Originally, the pixel shader was referred to as "WM" (the
Windowizer/Masker unit).  So, this code happened to only be relevant for
the WM stage, at the time.

However, sampler state really applies to all stages, so putting "wm" in
the filename doesn't make sense.  I dropped it in gen7_sampler_state.c;
at this point the asymmetry just trips people up.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
i965: Write a better file comment for brw_sampler_state.c.

The old one has been inaccurate for years.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
i965: Drop the degenerate brw_sampler_default_color structure.

It's just an array of four floats, and we have an array of four floats,
so this is literally just a memcpy...but with custom structs and strange
macros to give the appearance of doing something more.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
i965: Stop storing sdc_offset in brw_stage_state.

sdc_offset is produced and consumed in the same function, so there's no
need to store it in the context, nor pass pointers to it through various
call chains.

Saves 128 bytes per brw_stage_state structure, and makes the code
clearer as well.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
i965: Drop unused 'ss_index' parameter from gen7_update_sampler_state.

This was copied from the Gen4-6 code, but is unused.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
i965: Push computation for sampler state batch offsets up a level.

Other than this, brw_update_sampler_state only deals with a single
SAMPLER_STATE structure, and doesn't need to know which position it is
in the table.  The caller takes care of dealing with multiple surface
states.

Pushing this up a level allows us to drop the ss_index parameter.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
i965: Shift brw_upload_sampler_state_table away from structures.

The Gen4-6 and Gen7+ code is virtually identical, but both use different
structure types.  Switching to use a uint32_t pointer and operate on the
number of DWords will make it possible to share code.

It turns out that SURFACE_STATE is the same number of DWords on every
platform currently; it will be easy to handle a change there, though.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
i965: Make brw_upload_sampler_state_table handle Gen7+ as well.

This copies a few changes from gen7_upload_sampler_state_table; the next
patch will delete that function.

Gen7+ has per-stage sampler state pointer update packets, so we emit
them as soon as we emit a new table for a stage.  On Gen6 and earlier,
we have a single packet, so we delay until we've changed everything
that's going to be changed.

v2: Split 3DSTATE_SAMPLER_STATE_POINTERS_XS packet emission into a
    helper function (suggested by Topi Pohjolainen).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
i965: Delete gen7_upload_sampler_state_table and vtable mechanism.

brw_upload_sampler_state_table now handles all generations, so we don't
need the vtable mechanism either.

There's still a lot of code duplication; the next patches will address
that.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
i965: Convert wrap mode #defines to an enum.

This makes it easy to tell that they're grouped together, and also
improves gdb printing.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
i965: Add #defines for SAMPLER_STATE fields.

We'll use these to replace the existing structures.

I've adopted the convention that "BRW" applies to all hardware, and
"GENX" applies starting with generation X, but might be replaced by some
later generation.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
i965: Add const to upload_default_color's sampler parameter.

It doesn't edit the value, and this lets us use const in more places.

Needed to implement Topi's review comments for the next patch.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
i965: Introduce a function to emit a SAMPLER_STATE structure.

This simply assembles all the SAMPLER_STATE fields into their proper bit
locations.  Making it work on all generations was easy enough; some of
the fields are even in the same place.

Not used by anything yet, but will be soon.  I made it non-static so
BLORP can use it too.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
i965: Make brw_update_sampler_state() use brw_emit_sampler_state().

Instead of stuffing bits directly into the brw_sampler_state structure,
we now store them in local variables, then use brw_emit_sampler_state()
to assemble the packet.  This separates the decision about what values
to use from the actual packet emission, which makes the code more
reusable across generations.

v2: Put const on a bunch of local variables and move declarations,
    as suggested by Topi Pohjolainen.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
i965: Make brw_update_sampler_state use 8 bits for LOD fields on Gen7+.

This was the only actual difference between Gen4-6 and Gen7+ in terms of
the values we program.  The rest was just mechanical structure
rearrangement.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>