Updated issue_021_quartus and issue_016_quartus
updated foundbugs/issue_003_quartus.md
added simlib and simcells to validate_yosys
new synthesis script for Cadence Conformal LEC
Cleaned up copy&paste orgy in Makefile
Merge remote-tracking branch 'upstream/master'
Added CMOS cell library
If everything else fails, fall back to yosim as $goodsim
Fixed README typos
added synthesis script for Synopsys Design Compiler
Merge remote-tracking branch 'upstream/master'