msm: mpm-of: fix for "cxo_lpm_clk is unbalanced" slowpath warning.

The variable xo_enabled needs protection. It might get called
simultaneously from suspend and mpm worker thread context.
Added a mutex to prevent this.

WARNING: at kernel/arch/arm/mach-msm/clock.c:411 clk_disable+0xc8/0x150()
cxo_lpm_clk is unbalanced
Modules linked in: adsprpc texfat(PO) mwlan_aarp(PO)
[<c010d24c>] (unwind_backtrace+0x0/0x138) from [<c01a0408>]
(warn_slowpath_common+0x4c/0x64)
[<c01a0408>] (warn_slowpath_common+0x4c/0x64) from [<c01a04b4>]
(warn_slowpath_fmt+0x30/0x40)
[<c01a04b4>] (warn_slowpath_fmt+0x30/0x40) from [<c011a068>]
(clk_disable+0xc8/0x150)
[<c011a068>] (clk_disable+0xc8/0x150) from [<c0180568>]
(msm_mpm_sys_low_power_modes+0x28/0x84)
[<c0180568>] (msm_mpm_sys_low_power_modes+0x28/0x84) from [<c0180768>]
(msm_mpm_work_fn+0x1c/0x5c)
[<c0180768>] (msm_mpm_work_fn+0x1c/0x5c) from [<c01b9568>]
(process_one_work+0x128/0x490)
[<c01b9568>] (process_one_work+0x128/0x490) from [<c01b9c14>]
(worker_thread+0x164/0x35c)
[<c01b9c14>] (worker_thread+0x164/0x35c) from [<c01be9a8>]
(kthread+0x88/0x94)
[<c01be9a8>] (kthread+0x88/0x94) from [<c0107a04>]
(kernel_thread_exit+0x0/0x8)
---[ end trace d18a7d72e45b272f ]---
------------[ cut here ]------------
WARNING: at kernel/arch/arm/mach-msm/clock.c:436 clk_unprepare+0xac/0xd4()
cxo_lpm_clk is unbalanced (prepare)
Modules linked in: adsprpc texfat(PO) mwlan_aarp(PO)
[<c010d24c>] (unwind_backtrace+0x0/0x138) from [<c01a0408>]
(warn_slowpath_common+0x4c/0x64)
[<c01a0408>] (warn_slowpath_common+0x4c/0x64) from [<c01a04b4>]
(warn_slowpath_fmt+0x30/0x40)
[<c01a04b4>] (warn_slowpath_fmt+0x30/0x40) from [<c011aa78>]
(clk_unprepare+0xac/0xd4)
[<c011aa78>] (clk_unprepare+0xac/0xd4) from [<c0180570>]
(msm_mpm_sys_low_power_modes+0x30/0x84)
[<c0180570>] (msm_mpm_sys_low_power_modes+0x30/0x84) from [<c0180768>]
(msm_mpm_work_fn+0x1c/0x5c)
[<c0180768>] (msm_mpm_work_fn+0x1c/0x5c) from [<c01b9568>]
(process_one_work+0x128/0x490)
[<c01b9568>] (process_one_work+0x128/0x490) from [<c01b9c14>]
(worker_thread+0x164/0x35c)
[<c01b9c14>] (worker_thread+0x164/0x35c) from [<c01be9a8>]
(kthread+0x88/0x94)
[<c01be9a8>] (kthread+0x88/0x94) from [<c0107a04>]
(kernel_thread_exit+0x0/0x8)
---[ end trace d18a7d72e45b2730 ]---

CRs-fixed: 596765
Change-Id: Ibe685e8f37eb63c4e9e9d3434719985f33c63376
Signed-off-by: Anil kumar mamidala <amami@codeaurora.org>
msm: mpm-of: set wakeup interrupt as NO_SUSPEND

The MPM wakeup interrupt is used to wakeup the Apps processor from
a system wide low power mode when the GIC isn't operational.

The MPM interrupt is configured as a wakeup interrupt by calling into
irq_set_irq_wake().It also needs to be configured with the
IRQF_NO_SUSPEND to prevent the irq from getting disabled during
suspend_device_irqs() in the suspend path. The interrupt is not
re-enabled until after gic_suspend() is executed as a part of the
syscore_suspend() callback.

If the CPU's idle thread enters RPM assisted power collapse between
suspend_device_irqs() and syscore_suspend, the masking of the RPM wakeup
interrupt could prevent wakeup by RPM.

Change-Id: I0d5f0d7277774ddef6817eac10156f92174ec15f
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
qcom: mpm-of: fix bug in finding the pending interrupts

When APPS proc wakeup from RPM assisted PC states it reads
the vMPM status register to know the reason for wakeup and
retrigger the interrupts to handle it. Current code is not
caring about actual enabled interrupts in vMPM. Sometimes
this is causing APPS proc unnecessarily triggering the
interrupts which are not raised in the system. Fix this by
considering the enabled interrupts in vMPM before triggering
the interrupts.

CRs-fixed: 623293
Change-Id: Ia793e6d501cac3d85b51ed6e359703239a4b9945
Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>
Fix another GCC 4.9 error

Signed-off-by: Kostas K <mpokwsths@gmail.com>
Revert "ion: Adapt IOMMU heap to latest changes"

This reverts commit 37832e63953aeedfffe03c4a5b2b136c431503c5.
ion: Adapt IOMMU heap to latest changes

Since we preserved IOMMU heap it should be adapted to the latest ion changes

Signed-off-by: Kostas K <mpokwsths@gmail.com>
Remove useless stuff

Signed-off-by: Kostas K <mpokwsths@gmail.com>
defconfig: Update

Signed-off-by: Kostas K <mpokwsths@gmail.com>
msm: spm-v2: Store voltage levels into PMIC_DATA3

On certain targets, where the SPM controls the power supply for each
core, the SPM power down sequence takes care of restoring the Voltage
level after a power collapse to the appropriate sleep level. The active
voltage level is stored in the PMIC_DATA_3 register and SPM state
machine uses the data in this register to restore the voltage to the
current active level.

Change-Id: I4a25440e818abdefec8cdfd3491fe9a7d772aab4
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
msm: spm-v2: Flush the PMIC_DATA registers

Different versions of SAW use different PMIC_DATA registers to
save the current voltage, which is used to restore voltage when
exiting low power modes. Flush the appropriate PMIC_DATA registers
depending on the SAW versions.

Change-Id: I7b421ed7e60ebde7c1f9ef32ce1a047ca361c32c
Signed-off-by: Archana Sathyakumar <asathyak@codeaurora.org>
msm: spm: Update the vctl, phase and pfm port values for cpu devices

Currently only L2 device updates these values. Update this information
for cpu devices as well to support individual rail configuration.

Update device tree documentation for these nodes.

Change-Id: Ib147ab1eaf8ac961c566cfc48f54ed904efaca1d
Signed-off-by: Archana Sathyakumar <asathyak@codeaurora.org>
msm: spm: Replace smp_processor_id call with get_cpu

Spm_processor_id call results in warning message when
called with preempt enabled. Instead call get_cpu to get
the current cpu ID and enable preempt again because the
function further calls smp_call_function_single which
disables preempt within.

Change-Id: I246f26b023da97038c5d6b675a820f07ac62fda1
Signed-off-by: Archana Sathyakumar <asathyak@codeaurora.org>
msm: spm: Do not fail in absence of vctl timeout node

Currently the spm probe fails for L2 if there is no vctl timeout
node present for it. To support targets with gang and individual rail
configuration remove the failure condition. Do not fail the device probe
if this node is not found.

Change-Id: I1625bc01c19bc136a9bacc2f3a3850cb10f9683d
Signed-off-by: Archana Sathyakumar <asathyak@codeaurora.org>
msm: spm: Update msm_spm_turn_on_cpu_rail() to use new SAW2 base address

Update the msm_spm_turn_on_cpu_rail() to use SAW2 base addresses passed
from the release_secondary to turn on the cpu rail, before bringing back
the cpu online.

Change-Id: Ic57d3995c42291d9d2f28f03591823056bf0ff41
Signed-off-by: Praveen Chidambaram <pchidamb@codeaurora.org>
msm: spm-v2: Use proper register offsets for SAW2_v3.0

Current code get the register offsets for SAW2 based
on hardcode macros. Use SAW2 major, minor numbers to
get the proper register offsets to different versions
of SAW2 controllers(i.e: SAW2_v2.1 and SAW2_v3.0) and
this patch remove the SAW2_v1.1 controller related code.

Change-Id: Ib80e06caab7d999bfec3ba94b786de2f5ef2074c
Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>
msm: rpm_log: Support RPM log on 8084

Fixed compilation issues for RPM stats module on 8084

Change-Id: Id168a20f8fb26df20f2115925fc9fcfa2f8284e8
Signed-off-by: Dilip Gudlur <dgudlur@codeaurora.org>
msm: rpm-master-stat: Modify RPM master stats platform data

Currently each master stats are placed in RPM message
RAM at a fixed offset location. This can be varied across
different platforms. Hence adding  a 'master_offset'
variable to platform data. This avoids the hard coding
of offset value in rpm master stats driver.

CRs-Fixed: 517589
Change-Id: Ifb89b518930022a735495622712f694a987f47f3
Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>
msm: rpm_master_stats: Add DT support for rpm master stat driver

RPM master stats driver is used to show each master stats by
reading the RPM message RAM. These stats shows the useful
information of each subsystems like "active cores", "number of
shoutdowns" and "wakeup reason" etc. Current driver do not have
the DT support and it can't be used for few targets. Hence
implementing the DT support and make the driver more generic to
support different family of chipsets.

CRs-Fixed: 517589
Change-Id: If6695939c6da5e0620f91f21a8b377be12ccb444
Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>

Conflicts:
	arch/arm/mach-msm/rpm_master_stat.c
msm: pm: fix power driver compilation issues

Fix power driver compilation issues. Modify basic data types
usage(i.e long & pointer sizes) such that make power drivers
more generic to compile for different build environments.

CRs-fixed: 579034
Change-Id: I49dfb08037da9f1bb00814f5c3961db0434887ea
Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>

Conflicts:
	arch/arm/mach-msm/pm-8x60.c
msm: spm: set pc mode bit for SAW2_3.0

Set the power collapse bitin SAW2_SPM_CTL register.
This bit is used to differentiate other low power modes
from power collapse mode. This information is used for
contolling DBGWRDUP input signal. If PC_MODE is set DBGPWRDUP
signal is de-asserted as soon as SPM_WAIT_ACK becomes HIGH.
When the PC mode is not set it will help in early exit from
clock gating.

Change-Id: I74c44d3bb2b02bec449c809a5868ff944436eb09
Signed-off-by: Venkat Devarasetty <vdevaras@codeaurora.org>