spi: zynq-qspi: Wait for FIFO to be empty when switching TXD registers

When switching from TXD0 to TXD1/2/3, software has to wait for FIFO to be
empty before writing to TXD1/2/3 as per the documentation.

Although previous discussions and tests revealed that this waiting
is required only for TXD1/2/3 to TXD0 switches and not vice-verse,
design team conveyed that TXD0 to TXD1/2/3 switching can behave unpredictably
if wait is not used. Hence this change is made to comply.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Acked-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>