tools/configs: Describe PCI capabilities in config files

Instead of parsing the PCI config spaces in the hypervisor, offload this
to the configuration generator. It will produce a (logically) linked
list of capabilities per device, their ID, start and length. Each
capability can furthermore be marked as writable by the cell.

Note that identical capability lists shared between multiple devices
will automatically folded into a single one. The user can duplicate and
customize them individually in a manual post-processing step.

Configurations are updated for QEMU and the H87i.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
core: Moderate access to PCI capabilities

Make use of the capability configuration and permit write access only to
explicitly configured capabilities. Read access is harmless as it is
free of side effects.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
core: Allow writing to more PCI config space registers

Enable write access to the Master Latency Timer (non-functional for
PCIe) and the Cacheline Size (no misuse potential identified).

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>