Merge r203622 from head:

  Add support for a few more Sony-specific ACPI features (default display
  brightness, wired LAN power and bass gain), and update the description of
  one previously unknown feature (display contrast).  While here, expand on
  a comment and remove two defines left over from an old version of the code.

  Also update man page to document the above changes, and correct grammar.

PR:		kern/127581
MFC r205027

Let detailed info about CPU features print on Marvell Sheeva CPU as well.

Provide missing entry in the cpu_classes[].

Reported by:	Maks Verver
MFC r203834 and r205197: Make ALTQ work for drbr consumers.
MFC r202821-202822.

r202821:
  Fix a long standing ASF heartbeat sending bug. The initial
  implementation of heartbeat interval was 2 but there was typo which
  caused the heartbeat is sent approximately every 5 seconds. This
  caused unintended controller reset by firmware because firmware
  thought OS was crashed.

  Submitted by:	Floris Bos < info <> je-eigen-domein dot nl >
  Tested by:	Andrzej Tobola < ato <> iem dot pw dot edu dot pl >

r202822:
  Use new handshake command for BCM5750 or new controllers.
MFC r203355:
  Add more bit definitions to PCI express device control and device
  status register.
MFC r203358,203716:

r203358:
  PCI express device status register has W1C feature. Writing 0 has
  no effect. Make sure to clear error bits by writing 1. [1]
  While I'm here use predefined value instead of hardcodig magic
  vlaue.

  Submitted by:	msaitoh at NetBSD [1]

r203716:
  Move device specific flag configuration to attach routine.
  The softc obtained in device probe wouldn't be the same one used in
  device attach. Drivers should not assume any values stored in softc
  structure in probe routine will be available for its attach routine.
MFC r202826-202827,204146

r202826:
  s/Mhz/MHz/g

  Submitted by:	N.J. Mann <njm <> njm dot me dot uk >

r202827:
  Yukon Ultra2 has 125MHz clock.

r204146:
  Correct inversed programming of ethernet hardware address on
  big-endian architecture.

  Submitted by:	C. Jayachandran <c.jayachandran at gmail dot com> (initial version)
MFC r204149:
  Add TSO support on VLANs. Intentionally separated IFCAP_VLAN_HWTSO
  from IFCAP_VLAN_HWTAGGING. I think some hardwares may be able to
  TSO over VLAN without VLAN hardware tagging.
  Driver changes and userland support will follow.
MFC r204150:
  Add TSO support on VLAN in fconfig(8).
MFC r202717:
  - Added a workaround for NC-SI management firmware that would allow
    frames to be accepted while the driver is resetting the hardware.
    This failure is generally observed when broadcast frames are received
    during driver load and will generate "Unable to write CTX memory"
    errors.
  - Small changes to driver flags display.

PR:	kern/135836, kern/140684
MFC r204755:
Update the list of the process flags. Note that the lists of pending
signals for process and its threads are distinct.
MFC r205224:
Add missing headers.
MFC r205225:
Add missing headers. While there, arrange headers alphabetically.
MFC r204082,204179,204180,204218,204241,204247,204270,204692:

Provide thermal management and monitoring features in smu(4). This allows
fan control and thermal monitoring on SMU-based Apple G5 machines, as well
as an led(4) interface to control the sleep LED.
MFC r204903:

Place interrupt handling in a critical section and remove double
counting in incrementing the interrupt nesting level. This fixes a number
of bugs in which the interrupt thread could be preempted by an IPI,
indefinitely delaying acknowledgement of the interrupt to the PIC, causing
interrupt starvation and hangs.

Reported by:	linimon
Reviewed by:	marcel, jhb
Fix a bug where pages being removed from memory entirely no longer have
PVOs, and so the modified state of the page can no longer be communicated
to the VM layer, causing pages not to be flushed to swap when needed, in
turn causing memory corruption. Also make several correctness adjustments
to I-Cache synchronization and TLB invalidation for 64-bit Book-S CPUs.

Obtained from:	projects/ppc64
Discussed with:	grehan
MFC r204128:

Reduce KVA pressure on OEA64 systems running in bridge mode by mapping
UMA segments at their physical addresses instead of into KVA. This emulates
the direct mapping behavior of OEA32 in an ad-hoc way. To make this work
properly required sharing the entire kernel PMAP with Open Firmware, so
ofw_pmap is transformed into a stub on 64-bit CPUs.

Also implement some more tweaks to get more mileage out of our limited
amount of KVA, principally by extending KVA into segment 16 until the
beginning of the first OFW mapping.

Reported by:	linimon
MFC r204268:

Close a race involving the OEA64 scratchpage. When the scratch page's
physical address is changed, there is a brief window during which its PTE
is invalid. Since moea64_set_scratchpage_pa() does not and cannot hold
the page table lock, it was possible for another CPU to insert a new PTE
into the scratch page's PTEG slot during this interval, corrupting both
mappings.

Solve this by creating a new flag, LPTE_LOCKED, such that
moea64_pte_insert will avoid claiming locked PTEG slots even if they
are invalid. This change also incorporates some additional paranoia
added to solve things I thought might be this bug.

Reported by:	linimon
MFC r204269:

Use dcbz instead of word stores for page zeroing, providing a factor of
3-4 speedup.
MFC r204296:

Provide an implementation of pmap_dev_direct_mapped() on OEA64. This is
required in order to be able to mmap the running kernel, which is turn
required to avoid fstat returning gibberish.