2014-08-11  Joel Sherrill <joel.sherrill@oarcorp.com>

	* s-osinte-rtems.adb: Correct formatting of line in license block.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@213839 138bc75d-0d04-0410-961f-82ee72b054a4
Daily bump.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@213844 138bc75d-0d04-0410-961f-82ee72b054a4
	Backport from mainline
	2014-08-11  Janis Johnson  <janisjo@codesourcery.com>

	* lib/target-supports.exp (check_effective_target_arm_thumb1_ok,
	check_effective_target_arm_thumb2_ok): Test with code that passes
	an argument and returns a result.

	* gcc.target/arm/frame-pointer-1.c: Skip if Thumb is not supported.
	* gcc.target/arm/pr56184.C: Likewise.
	* gcc.target/arm/pr59896.c: Likewise.
	* gcc.target/arm/stack-red-zone.c: Likewise.
	* gcc.target/arm/thumb-find-work-register.c: Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@213820 138bc75d-0d04-0410-961f-82ee72b054a4
	PR target/62038
	* config/pa/pa.c (pa_asm_output_mi_thunk): Use a branch with %r31 link
	register.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@213830 138bc75d-0d04-0410-961f-82ee72b054a4
Revert last change.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@213836 138bc75d-0d04-0410-961f-82ee72b054a4
Backport from mainline 64-bit multiplication handling without vpmacsdql instruction

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@213850 138bc75d-0d04-0410-961f-82ee72b054a4
Backport from mainline AMD BTVER2 handling with extended family information

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@213852 138bc75d-0d04-0410-961f-82ee72b054a4
Backport from mainline RDRND and MOVBE addition for AMD BDVER4

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@213855 138bc75d-0d04-0410-961f-82ee72b054a4
PR other/61962

gcc/c-family/
	* array-notation-common.c (find_rank): Added handling for other
	types of references.

gcc/testsuite/
	* c-c++-common/cilk-plus/AN/pr61962.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@213859 138bc75d-0d04-0410-961f-82ee72b054a4
	Backport from mainline
	2014-08-12  Janis Johnson  <janisjo@codesourcery.com>

	* lib/target/supports.exp
	(check_effective_target_arm_v8_neon_ok_nocache): Check for armv8
	or later.

	* gcc.dg/pr59418.c: Don't add ARM options for a Thumb1 multilib.

	* gcc.target/arm/neon-vext-execute.c: Skip if the test won't run
	on Neon hardware.

	* gcc.target/arm/pr48784.c: Skip for thumb1 multilib.
	* gcc.target/arm/pr59985.c: Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@213867 138bc75d-0d04-0410-961f-82ee72b054a4
2014-08-12  Michael Meissner  <meissner@linux.vnet.ibm.com>

	Backport patch from mainline
	2014-08-11  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/constraints.md (wh constraint): New constraint,
	for FP registers if direct move is available.
	(wi constraint): New constraint, for VSX/FP registers that can
	handle 64-bit integers.
	(wj constraint): New constraint for VSX/FP registers that can
	handle 64-bit integers for direct moves.
	(wk constraint): New constraint for VSX/FP registers that can
	handle 64-bit doubles for direct moves.
	(wy constraint): Make documentation match implementation.

	* config/rs6000/rs6000.c (struct rs6000_reg_addr): Add
	scalar_in_vmx_p field to simplify tests of whether SFmode or
	DFmode can go in the Altivec registers.
	(rs6000_hard_regno_mode_ok): Use scalar_in_vmx_p field.
	(rs6000_setup_reg_addr_masks): Likewise.
	(rs6000_debug_print_mode): Add debug support for scalar_in_vmx_p
	field, and wh/wi/wj/wk constraints.
	(rs6000_init_hard_regno_mode_ok): Setup scalar_in_vmx_p field, and
	the wh/wi/wj/wk constraints.
	(rs6000_preferred_reload_class): If SFmode/DFmode can go in the
	upper registers, prefer VSX registers unless the operation is a
	memory operation with REG+OFFSET addressing.

	* config/rs6000/vsx.md (VSr mode attribute): Add support for
	DImode.  Change SFmode to use ww constraint instead of d to allow
	SF registers in the upper registers.
	(VSr2): Likewise.
	(VSr3): Likewise.
	(VSr5): Fix thinko in comment.
	(VSa): New mode attribute that is an alternative to wa, that
	returns the VSX register class that a mode can go in, but may not
	be the preferred register class.
	(VS_64dm): New mode attribute for appropriate register classes for
	referencing 64-bit elements of vectors for direct moves and normal
	moves.
	(VS_64reg): Likewise.
	(vsx_mov<mode>): Change wa constraint to <VSa> to limit the
	register allocator to only registers the data type can handle.
	(vsx_le_perm_load_<mode>): Likewise.
	(vsx_le_perm_store_<mode>): Likewise.
	(vsx_xxpermdi2_le_<mode>): Likewise.
	(vsx_xxpermdi4_le_<mode>): Likewise.
	(vsx_lxvd2x2_le_<mode>): Likewise.
	(vsx_lxvd2x4_le_<mode>): Likewise.
	(vsx_stxvd2x2_le_<mode>): Likewise.
	(vsx_add<mode>3): Likewise.
	(vsx_sub<mode>3): Likewise.
	(vsx_mul<mode>3): Likewise.
	(vsx_div<mode>3): Likewise.
	(vsx_tdiv<mode>3_internal): Likewise.
	(vsx_fre<mode>2): Likewise.
	(vsx_neg<mode>2): Likewise.
	(vsx_abs<mode>2): Likewise.
	(vsx_nabs<mode>2): Likewise.
	(vsx_smax<mode>3): Likewise.
	(vsx_smin<mode>3): Likewise.
	(vsx_sqrt<mode>2): Likewise.
	(vsx_rsqrte<mode>2): Likewise.
	(vsx_tsqrt<mode>2_internal): Likewise.
	(vsx_fms<mode>4): Likewise.
	(vsx_nfma<mode>4): Likewise.
	(vsx_eq<mode>): Likewise.
	(vsx_gt<mode>): Likewise.
	(vsx_ge<mode>): Likewise.
	(vsx_eq<mode>_p): Likewise.
	(vsx_gt<mode>_p): Likewise.
	(vsx_ge<mode>_p): Likewise.
	(vsx_xxsel<mode>): Likewise.
	(vsx_xxsel<mode>_uns): Likewise.
	(vsx_copysign<mode>3): Likewise.
	(vsx_float<VSi><mode>2): Likewise.
	(vsx_floatuns<VSi><mode>2): Likewise.
	(vsx_fix_trunc<mode><VSi>2): Likewise.
	(vsx_fixuns_trunc<mode><VSi>2): Likewise.
	(vsx_x<VSv>r<VSs>i): Likewise.
	(vsx_x<VSv>r<VSs>ic): Likewise.
	(vsx_btrunc<mode>2): Likewise.
	(vsx_b2trunc<mode>2): Likewise.
	(vsx_floor<mode>2): Likewise.
	(vsx_ceil<mode>2): Likewise.
	(vsx_<VS_spdp_insn>): Likewise.
	(vsx_xscvspdp): Likewise.
	(vsx_xvcvspuxds): Likewise.
	(vsx_float_fix_<mode>2): Likewise.
	(vsx_set_<mode>): Likewise.
	(vsx_extract_<mode>_internal1): Likewise.
	(vsx_extract_<mode>_internal2): Likewise.
	(vsx_extract_<mode>_load): Likewise.
	(vsx_extract_<mode>_store): Likewise.
	(vsx_splat_<mode>): Likewise.
	(vsx_xxspltw_<mode>): Likewise.
	(vsx_xxspltw_<mode>_direct): Likewise.
	(vsx_xxmrghw_<mode>): Likewise.
	(vsx_xxmrglw_<mode>): Likewise.
	(vsx_xxsldwi_<mode>): Likewise.
	(vsx_xscvdpspn): Tighten constraints to only use register classes
	the types use.
	(vsx_xscvspdpn): Likewise.
	(vsx_xscvdpspn_scalar): Likewise.

	* config/rs6000/rs6000.h (enum rs6000_reg_class_enum): Add wh, wi,
	wj, and wk constraints.
	(GPR_REG_CLASS_P): New helper macro for register classes targeting
	general purpose registers.

	* config/rs6000/rs6000.md (f32_dm): Use wh constraint for SDmode
	direct moves.
	(zero_extendsidi2_lfiwz): Use wj constraint for direct move of
	DImode instead of wm.  Use wk constraint for direct move of DFmode
	instead of wm.
	(extendsidi2_lfiwax): Likewise.
	(lfiwax): Likewise.
	(lfiwzx): Likewise.
	(movdi_internal64): Likewise.

	* doc/md.texi (PowerPC and IBM RS6000): Document wh, wi, wj, and
	wk constraints. Make the wy constraint documentation match them
	implementation.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@213871 138bc75d-0d04-0410-961f-82ee72b054a4
2014-08-12  Joel Sherrill <joel.sherrill@oarcorp.com>

	* Makefile.in: Add CFLAGS_FOR_TARGET to GNATLIBCFLAGS_FOR_C.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@213881 138bc75d-0d04-0410-961f-82ee72b054a4
2014-08-12  Joel Sherrill <joel.sherrill@oarcorp.com>

	* socket.c: For RTEMS, use correct prototype of gethostbyname_r().
	* gsocket.h Add include of <unistd.h> on RTEMS.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@213882 138bc75d-0d04-0410-961f-82ee72b054a4
	PR target/62025
	* sched-deps.c (find_inc): Check if inc_insn doesn't clobber
	any registers that are used in mem_insn.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@213888 138bc75d-0d04-0410-961f-82ee72b054a4
Daily bump.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@213895 138bc75d-0d04-0410-961f-82ee72b054a4
2014-08-12  Felix Yang  <fei.yang0953@gmail.com>

	PR tree-optimization/62073
	* tree-vect-loop.c (vect_is_simple_reduction_1): Check that DEF1 has
	a basic block.

	* gcc.dg/vect/pr62073.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@213901 138bc75d-0d04-0410-961f-82ee72b054a4
compiler, runtime: Fix unexpected GC interfering with closure passing.

The Go frontend passes closures through to functions using the
functions __go_set_closure and __go_get_closure.  The
expectation is that there are no function calls between
set_closure and get_closure.  However, it turns out that there
can be function calls if some of the function arguments
require type conversion to an interface type.  Converting to
an interface type can allocate memory, and that can in turn
trigger a garbage collection, and that can in turn call pool
cleanup functions that may call __go_set_closure.  So the
called function can see the wrong closure value, which is bad.

This patch fixes the memory allocation function to preserve the
closure value across any possible garbage collection.

A test case is the libgo database/sql check run with the
environment variable GOGC set to 1.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@213933 138bc75d-0d04-0410-961f-82ee72b054a4
Daily bump.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@213935 138bc75d-0d04-0410-961f-82ee72b054a4
2014-08-14  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    Backport from mainline
    2014-08-12  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/
    PR middle-end/62103
    * gimple-fold.c (fold_ctor_reference): Don't fold in presence of
    bitfields, that is when size doesn't match the size of type or the
    size of the constructor.

    gcc/testsuite/
    PR middle-end/62103
    * gcc.c-torture/execute/bitfld-6.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@213941 138bc75d-0d04-0410-961f-82ee72b054a4
[optabs.c] Fix ICE when expanding single-threaded version of atomic_test_and_set

	Backport from mainline
	2014-08-04  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	PR target/61713
	* gcc/optabs.c (expand_atomic_test_and_set): Do not try to emit
	move to subtarget in serial version if result is ignored.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@213954 138bc75d-0d04-0410-961f-82ee72b054a4