msm: clock.h: Fix compile with CONFIG_DEBUG_FS=n

The prototypes for clock_debug_init() differ between the debugfs
on and off case in the type of argument passed. Make them the
same to fix a compile error.

Change-Id: I905b9f1c752e3b419d0a1646b51a6ac1e54cfecc
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
msm: clock: Fix hardware clock gating detection for mdp_axi_clk

clock-debug uses a clock flag (CLKFLAG_HWCG) to determine if a
clock is capable of hardware gating. Unfortunately, recent
changes to clock handoff cause this flag to not always be set.

Take mdp_axi_clk for example. It is a depends of mdp_clk, and so
if mdp_clk is on out of the bootloader, mdp_axi_clk is indirectly
enabled by the clk_prepare_enable() call in __handoff_clk() when
mdp_clk is enabled. We could add support for handing off depends
clocks, but we're planning on removing the depends code and there
isn't a real problem in failing to hand off branches that are
depends since they're hidden from consumers anyway.

The only problem with this scenario is that branch_handoff() is
not called and so mdp_axi_clk is not marked as supporting
hardware clock gating. The clock flag is only used to indicate
support for hardware clock gating, so let's just read the
hardware anytime a users wants to know if the clock has hardware
gating or not.

This changes the semantics of the has_hw_gating file because we
read the hardware instead of returning a cached value and the
state of the hardware changes at runtime (e.g. if the clock is
put into reset hardware gating is turned off). In practice these
clocks aren't switching in and out of hardware gating mode while
a clock test is in progress so the impact of this change is
minimal to zero.

Change-Id: I4f646b1b32b42e3ef00067b47ffb78df8fb761d5
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>

Conflicts:
	arch/arm/mach-msm/clock-debug.c
	arch/arm/mach-msm/clock-local.c
msm: clock-debug.c: Display clock vdd fmax values

Display the voltage level a clock votes for debugging.
The currently selected level is shown in square brackets.

Change-Id: I5062c5ea05408c94b63a1eeb376c42da9b7e5908
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>

Conflicts:
	arch/arm/mach-msm/clock.c
	arch/arm/mach-msm/clock.h
msm: clock-8960: Store current HDMI PLL rate in clk->rate

This allows for a vdd_class, which reference clk->rate, to be used
with the HDMI PLL. It also removes the need to have a .get_rate
op implemented.

Change-Id: I1fd7eba16fa1e1af56513d400e58fdfdaff931e4
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
msm: clock-8960: Support alternate PLL4 clock plan

PLL4 may be running at either 491.52MHz or 393.216MHz. Detect the
rate at runtime and select the appropriate frequency tables so that
the same rates for PLL4-based clocks can be used with either
configuration.

To ensure that any PLL configuration done as part of reg_init()
takes place before the rate-detection occurs, move the reg_init()
call to the top of msm8960_clock_pre_init().

Change-Id: I547ce16334acaeee4797147e47684672d8a5bade
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>

Conflicts:
	arch/arm/mach-msm/clock-8960.c
msm: clock-8960: Add 256 KHz pcm clock rate

Add support for a rate of 256 KHz on the PCM clock.

Change-Id: I5f36bdfa53625b0d35c5068bf631ed3c77daae1a
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
msm: clock-8960: Move DSI resets functionality to their own clocks

The DSI core resets are currently associated with the DSI byte clocks
because the DSI core clocks are managed by the DSI driver directly,
not the clock driver. Move the reset functionality out of the byte
and into their own reset-only branch clocks so that the footswitch
driver, which needs to assert these resets, can do so without
involving the unrelated byte clock.

Change-Id: I2b67ebc6eca343b853f441203874230b8e35f048
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
msm: footswitch-8x60: Reset DSI domain along with MDP collapse/restore

Some DSI-related logic lives in MDP's collapsible GDHS domain for
8960, 8064 and 8930. Assert the reset to this domain when the reset
of MDP is reset. Use of the reset-only clocks added here assumes the
display driver is making sure the DSI clocks (not managed by the
clock driver) are enabled for the duration of the collapse and
restore sequences so that the resets propagate.

Change-Id: I18638624f7ac92b9cb7228b014df7a187fe974fb
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>

Conflicts:
	arch/arm/mach-msm/devices-8064.c
	arch/arm/mach-msm/devices-8930.c
msm: clock: Move voltage scaling to prepare/unprepare

Move the voltage calls to a sleepable context so we can avoid
spinning for hundreds of microseconds with interrupts disabled
waiting for a regulator to increase. This change also paves the
way to making the clock driver into a real regulator consumer
that uses the proper regulator APIs instead of the MSM specific
rpm_vreg API.

Doing this also requires us to make clk_set_rate() a sleeping
call so that concurrent clk_prepare() and clk_set_rate() calls
are synchronized. Making clk_set_rate() sleepable also
necessitates moving the clk_set_rate() call in clock-voter.c to a
sleepable context. Do that by having clock-voter aggregate and
update the rate in prepare/unprepare instead of enable/disable
(note that enable/disable of voter clocks implicitly calls
enable/disable on the parent via generic clock code).

Now that clk_set_rate() is sleeping, call clk_prepare() and
clk_unprepare() in the clock-local code when a rate change
requires reparenting the clock. This cleans up a problem we have
where sources may be left unprepared by a clock rate switch
(hence the default true warned flag for PLLs and crystals).

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
(cherry picked from commit d86d1f2d968f194e3db46bb683e370a9fa3a6037)

Conflicts:

	arch/arm/mach-msm/clock-local2.c

Change-Id: Ie5bbb17537d5b33de92f8ea1c2da6070b18c14f1
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>

Conflicts:
	arch/arm/mach-msm/clock-local2.c
	arch/arm/mach-msm/clock.c
msm: clock-8960: Disable clk_prepare() warnings for CSI clocks

These clocks are special cases, since the set_rate() functions for
their children internally call clk_enable(). This will cause
warnings to be printed if the parents are not prepared.

This is currently harmless since clk_prepare() and clk_unprepare()
do not do anything yet. Fixing it properly, however, will involve
significant refactoring and moving functionality into the prepare
APIs. Since that phase of development is not complete yet, just
disable the warnings for now.

Change-Id: I3dc8661f9fcf2a84d748f2cf49cbed3f756c44bf
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
msm: clock: Remove warned flag

Now that all clock consumers have moved over to using the
clk_prepare/unprepare APIs we can remove the warned flag that
used to indicate that we had already warned about improper usage
of the clock APIs. In particular, we used this flag to avoid
printing warnings for "source" clocks such as PLLs and
crystals that no consumer directly controls but that the clock
driver calls clk_enable() on during clk_set_rate().

Let's use a local variable for clk->dbg_name too because we use
it many times and it makes lines too long.

Change-Id: I0cb3052fd3dec2e46788fbf039ac73f65551e9f9
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Neha Pandey <nehap@codeaurora.org>

Conflicts:
	arch/arm/mach-msm/clock-7x30.c
	arch/arm/mach-msm/clock-8974.c
	arch/arm/mach-msm/clock-8x60.c
	arch/arm/mach-msm/clock-9615.c
msm: clock-debug: Print clock name and rate on failure

Make this error message more informative about which clock failed
to have its rate changed, and what rate was attempted. Not all
users of debugfs are people and so the rate setting operation may
be buried layers deep in a script somewhere.

Change-Id: I6ae7f77f677b5077a294811d993df20aeadf1091
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
msm: clock-debug: Update debug_suspend feature for prepared state

If a clock is prepared and not enabled we don't print information
about that clock in the debug_suspend feature. Fix the code to
consider unprepared as the only case to bail out early and also
update the printk to display the prepare count and enable count.

Change-Id: Ie7b5527c17339e48b93dd6354fed132679351d18
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
(cherry picked from commit 9d96ae5c2bd779f0590565d137030eb4c367a28f)

Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
msm: clock-8960: Add core clock for second gfx3d iommu on 8960ab.

The 8960ab has two gfx3d iommus one of which was missing.
Also add a dependency on gfx3d_axi_clk for 8960ab.

Signed-off-by: Joel King <joelking@codeaurora.org>
(cherry picked from commit 9af070bb08217aa3668be5a1ff7ab3cc7964c64c)

Change-Id: Ic45910df027a02766a1841b825c16ea7413d65ca
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>

Conflicts:
	arch/arm/mach-msm/clock-8960.c
msm: clock-8960: Support new PMIC 8917 for 8930

Support detection of PMIC device type from board file.

Enable parent RPM_VREG_ID_PM8917_S8 regulator before turning on
HF_PLL/SR2 pll regulator, similar to 8960.

Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
(cherry picked from commit 1a3859fad1c2c0eb6f93464b9782fc0b1cb6ab14)

Change-Id: Ic2786f5957f793db482ef09c17752e2decb34301
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>

Conflicts:
	arch/arm/mach-msm/clock-8960.c
msm: clock-local: Add PXO rates for LPASS clocks on 8660, 8960, 8930, 8064

LPASS clock are enabled out of reset on these SoCs, with PXO selected
as their undivided source. Because PXO rates are not present in the
frequency tables however, these clocks fail to handoff with reason
'HANDOFF_UNKNOWN_RATE'. As a result, clock_late_init() does not attempt
to disable these clocks in lateinit.

Add PXO rates to the LPASS frequency tables so that handoff succeeds
and, in lateinit, disables them if they are not used.

(cherry picked from commit ac15a37fd85089a2aef16624140a5d0a6cd1d71b)

Signed-off-by: Matt Wagantall <mattw@codeaurora.org>

Change-Id: Id8d674bfa3d41316be8aa14c5cc84baa77078d23

Signed-off-by: Neha Pandey <nehap@codeaurora.org>

Conflicts:
	arch/arm/mach-msm/clock-8x60.c
msm: clock-8960: Lower frequency requirements of fpb active votes

We have an active set vote for the multimedia fpb and chip fpb so
that the registers are accessible whenever the processor is
awake. Unfortunately these requests are at the highest rate
supported which is not really necessary to ensure that the buses
are clocking. Lower the rate requests to the fastest speed that
doesn't require increasing voltages to allow the chip to hit low
voltages when the processor is awake.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
(cherry picked from commit 9e497f042d8525e57e11d417e9e37c2932a18dbf)

Change-Id: I3ee4926da0d953e7e31c3c64dffd11f6ee5edb72
Signed-off-by: Neha Pandey <nehap@codeaurora.org>
msm: clock-local: Make branch ctl_reg optional

Branch clocks will soon be used for reset-only purposes, in which
case the ctl_reg field will be NULL. Update the branch handoff
and disable code to check for a NULL register address before
reading the register.

Change-Id: I728b2c1ab2ea6a25010b15b3fb553390003175e2
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>

Conflicts:
	arch/arm/mach-msm/clock-local.c
msm: rpm-regulator: Add support for MSM8930 + PM8917

When using PMIC PM8917 along with MSM8930, the RPM resource map
changes from that which is used with stock MSM8930 + PM8038.  Add
support for the new resource map.

Change-Id: I4817872022f828dab055144959dfdfbd83e99e11
Signed-off-by: David Collins <collinsd@codeaurora.org>
(cherry picked from commit d2a4fefd4c6ca176715cb297edd63e141d19a4fb)

Conflicts:
	arch/arm/mach-msm/include/mach/rpm-regulator-8930.h
	arch/arm/mach-msm/rpm-regulator-8930.c