Usar dos memorias: una para simulacion, otra para sintesis
Implementar el barrel shifter
Implementar la unidad e multiplicacion y el testbench
Arreglar warnings
Usar 4 etapas para el multiplicador
Add extra signals to mult unit: Enable/valid operation, pipeline busy (at least 1 operation in mult pipe), and data ready
FIX: propagacion de enable_op -> active0 -> active 1
Modificar el testbench
Add comments
Add comments
Remove unused ports
Remove SIM_MODE. Dump register values @tb_core.v
Comments
Ignore ctags
Change project layout
Fix name
Fix script and makefile according to the new project layout
More comments, and remove Spanish comments.
Add divider module. TODO: verify its function
Compile before run (again)