GlobalOpt: Don't optimize thread_local for initializers

Folding a reference to a thread_local variable into another global
variable's initializer is very problematic, there is no relocation that
exists to represent such an access.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211762 91177308-0d34-0410-b5e6-96231b3b80d8
Added instruction combine to transform few more negative values addition to subtraction (Part 2)
This patch enables transforms for

(x + (~(y | c) + 1)   -->   x - (y | c) if c is even

Differential Revision: http://reviews.llvm.org/D4209



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211765 91177308-0d34-0410-b5e6-96231b3b80d8
This patch removed duplicate code for matching patterns 
which are now handled in SimplifyUsingDistributiveLaws() 
(after r211261)

Differential Revision: http://reviews.llvm.org/D4253



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211768 91177308-0d34-0410-b5e6-96231b3b80d8
[X86] Improve the selection of SSE3/AVX addsub instructions. 

This patch teaches the backend how to canonicalize a shuffle vectors
according to the rule:

 - (shuffle (FADD A, B), (FSUB A, B), Mask) ->
       (shuffle (FSUB A, -B), (FADD A, -B), Mask)

Where 'Mask' is:
  <0,5,2,7>            ;; for v4f32 and v4f64 shuffles.
  <0,3>                ;; for v2f64 shuffles.
  <0,9,2,11,4,13,6,15> ;; for v8f32 shuffles.

In general, ISel only knows how to pattern-match a canonical
'fadd + fsub + blendi' dag node sequence into an ADDSUB instruction.

This new rule allows to convert a non-canonical dag sequence into a
canonical one that will be matched by a single ADDSUB at ISel stage.

The idea of converting a non-canonical ADDSUB into a canonical one by
swapping the first two operands of the shuffle, and then negating the
second operand of the FADD and FSUB, was originally proposed by Hal Finkel.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211771 91177308-0d34-0410-b5e6-96231b3b80d8
Added parsing co-processor names starting with "cr"

Additional compliant GAS names for coprocessor register name
are enabled for all instruction with parameter MCK_CoprocReg:
LDC,LDC2,STC,STC2,CDP,CDP2,MCR,MCR2,MCRR,MCRR2,MRC,MRC2,MRRC,MRRC2

Patch by Andrey Kuharev.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211776 91177308-0d34-0410-b5e6-96231b3b80d8
add ppc64/pwr8 as target
includes handling DIR_PWR8 where appropriate
The P7Model Itinerary is currently tied in for use under the P8Model, and will be updated later.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211779 91177308-0d34-0410-b5e6-96231b3b80d8
Add support for ppc64/power8 as a host



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211781 91177308-0d34-0410-b5e6-96231b3b80d8
Silence a warning due to a comparison between signed and unsigned.

No functional change intended.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211782 91177308-0d34-0410-b5e6-96231b3b80d8
Silencing a warning about isZExtFree hiding an inherited virtual function. No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211783 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Add FP mode bits to binary.

The default rounding mode to initialize the mode register needs
to be reported to the runtime. Fill in other bits a kernel
may be interested in setting for future use.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211791 91177308-0d34-0410-b5e6-96231b3b80d8
Changed Phab 'CC' to 'subscriber'; fixed typo


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211793 91177308-0d34-0410-b5e6-96231b3b80d8
Move the frame lowering constructors out of line to avoid circular
includes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211798 91177308-0d34-0410-b5e6-96231b3b80d8
Move all of the ARM subtarget features down onto the subtarget
rather than the target machine.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211799 91177308-0d34-0410-b5e6-96231b3b80d8
Remove extraneous includes from the target machines.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211800 91177308-0d34-0410-b5e6-96231b3b80d8
GVN: Preserve invariant.load metadata

If both instructions to be replaced are marked invariant the resulting
instruction is invariant.

rdar://13358910

Fix by Erik Eckstein!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211801 91177308-0d34-0410-b5e6-96231b3b80d8
Fix the new LTOCodeGenerator setup in gold to parse options before using MAttrs.

This fixes a regression that made clang -flto -Wl,--plugin-opt=-mattr=+aes not
pass the "+aes" option to the LTOCodeGenerator attributes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211804 91177308-0d34-0410-b5e6-96231b3b80d8
fixed typo


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211808 91177308-0d34-0410-b5e6-96231b3b80d8
Remove the storage and use of the subtarget out of the sparc frame
lowering code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211809 91177308-0d34-0410-b5e6-96231b3b80d8
Have SparcSelectionDAGInfo take a DataLayout to initialize since
that's all it needs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211810 91177308-0d34-0410-b5e6-96231b3b80d8
Move the various Subtarget dependent members down to the subtarget
for the Sparc port. Use the same initializeSubtargetDependencies
function to handle initialization similar to the other ports to
handle dependencies.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211811 91177308-0d34-0410-b5e6-96231b3b80d8