arm/dts: batterydata: Add ED30 Sony

Add the ED30 Sony Battery Data and then setup the
the products to use the data that are capable of
getting the ED30 batteries.

Change-Id: I5353de17f1b57496261ddc1c8f5d5814ae310f6b
Signed-off-by: Kenny Kessler <kenny.kessler@motorola.com>
Reviewed-on: http://gerrit.mot.com/651461
Tested-by: Jira Key <jirakey@motorola.com>
Reviewed-by: Jason Knopsnyder <jasonk@motorola.com>
SLTApproved: Christopher Fries <cfries@motorola.com>
Submit-Approved: Jira Key <jirakey@motorola.com>
(cherry picked from commit fbc3ddb0e70536ce833705a3751c69cafd25e863)
arm/dts: batterydata: 0C for ED30 Sony

The Table is missing the 0 C row.  This prevents the
profile from loading correctly.

Change-Id: Ibdb778f371f1f294d6b43aaefadaf5a7ae91dda2
Signed-off-by: Kenny Kessler <kenny.kessler@motorola.com>
Reviewed-on: http://gerrit.mot.com/652679
Tested-by: Jira Key <jirakey@motorola.com>
Reviewed-by: Jason Knopsnyder <jasonk@motorola.com>
Submit-Approved: Jira Key <jirakey@motorola.com>
SLTApproved: Connie Zhao <czhao1@motorola.com>
(cherry picked from commit b34f42106b22dce7ea4fb6f225dbe2dbc6879d4d)
msm: kgsl: Mark the IOMMU setstate memory as read only

Mark the IOMMU setstate memory as read only in the pagetable.

Change-Id: Ic0dedbadb19e499c749cd744c3e89be3bcb4c2a2
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
(cherry picked from commit 88c2b761108194123604631dec1c374d31856a13)
Reviewed-on: http://gerrit.mot.com/637703
Submit-Approved: Jira Key <jirakey@motorola.com>
Tested-by: Jira Key <jirakey@motorola.com>
Reviewed-by: Fred Fettinger <fettinge@motorola.com>
Reviewed-by: Stephen Rossbach <rossbach@motorola.com>
SLTApproved: Connie Zhao <czhao1@motorola.com>
(cherry picked from commit f7527738cd9166632dde971ca1a314b2dc43efb4)
msm: kgsl: Enable protected register mode for A3XX

Turn on protected register mode for the A3XX GPU family and add 0x63
(RBBM_INT_0_MASK) to the list of protected registers.

Conflicts:

        drivers/gpu/msm/adreno.h
        drivers/gpu/msm/adreno_a3xx.c

Change-Id: Ic0dedbad10ebfa6eb6d3d815b5aa9b6b6f0e8e35
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Digish Pandya <digishp@codeaurora.org>
(cherry picked from commit 4198090756517fd9473815b5813ac4e0914e20d3)
Reviewed-on: http://gerrit.mot.com/637704
Submit-Approved: Jira Key <jirakey@motorola.com>
Tested-by: Jira Key <jirakey@motorola.com>
Reviewed-by: Fred Fettinger <fettinge@motorola.com>
Reviewed-by: Stephen Rossbach <rossbach@motorola.com>
SLTApproved: Connie Zhao <czhao1@motorola.com>
(cherry picked from commit 279aae16247267151dbc77f90c653a96644b94c6)

Conflicts:
	drivers/gpu/msm/adreno_a3xx.c
msm: kgsl: Protect CP_STATE_DEBUG_INDEX

Put CP_STATE_DEBUG_INDEX and CP_STATE_DEBUG_DATA under protection
to keep it from being written from an IB1. Doing so however opens
up a subtle "feature" in the microcode: memory read opcodes turn off
protected mode in the microcode to do the read and then turns it
back on regardless of the initial state. This is a problem if the
memory read happens while protected mode is turned off and then we
try to access a protected register which then complains and goes boom.

To account for this irregularity explicitly turn back off protected
mode in all the places where we know this will be a problem.

Change-Id: Ic0dedbad1397ca9b80132241ac006560a615e042
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Digish Pandya <digishp@codeaurora.org>
(cherry picked from commit 68162e981fd271baffe2510e77073aa29e3d1707)
Reviewed-on: http://gerrit.mot.com/637705
Submit-Approved: Jira Key <jirakey@motorola.com>
Tested-by: Jira Key <jirakey@motorola.com>
Reviewed-by: Fred Fettinger <fettinge@motorola.com>
Reviewed-by: Stephen Rossbach <rossbach@motorola.com>
SLTApproved: Connie Zhao <czhao1@motorola.com>
(cherry picked from commit 5cc393585a04f8a67658e014b4937914439226fd)
msm: kgsl: Fix protected mode for A3XX

Prior merges of the A3XX protected mode code were incorrect. Fix
up the changes to get the branch fully updated with the changes
from msm-3.10.

Change-Id: Ic0dedbad5a0e1aea181141de1527d74b42002e3c
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
(cherry picked from commit b669d24ce42488538399b61ee1edd50322d05cb5)
Reviewed-on: http://gerrit.mot.com/643875
Submit-Approved: Jira Key <jirakey@motorola.com>
Tested-by: Jira Key <jirakey@motorola.com>
Reviewed-by: Fred Fettinger <fettinge@motorola.com>
Reviewed-by: Stephen Rossbach <rossbach@motorola.com>
SLTApproved: Connie Zhao <czhao1@motorola.com>
(cherry picked from commit 17af08fc0e63a4c7b74cf13682796747dfed9e02)

Conflicts:
	drivers/gpu/msm/adreno_a3xx.c

Conflicts:
	drivers/gpu/msm/adreno.h
msm: kgsl: Protect SMMU registers from being written by the GPU

Put the SMMU register range in protected mode to shield them from
IB1/IB2 writes from userspace.

CRs-Fixed: 599971
Change-Id: Ic0dedbad8c03fc1c54ff73221231e2440d3c34dd
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
(cherry picked from commit 04fd1b22af7111c0026282eba7243d7a8ed8863a)
Reviewed-on: http://gerrit.mot.com/638201
Submit-Approved: Jira Key <jirakey@motorola.com>
Tested-by: Jira Key <jirakey@motorola.com>
Reviewed-by: Fred Fettinger <fettinge@motorola.com>
Reviewed-by: Stephen Rossbach <rossbach@motorola.com>
SLTApproved: Connie Zhao <czhao1@motorola.com>
(cherry picked from commit 81985c172a978998b311b7f10675b123506df649)
net/l2tp: don't fall back on UDP [get|set]sockopt

The l2tp [get|set]sockopt() code has fallen back to the UDP functions
for socket option levels != SOL_PPPOL2TP since day one, but that has
never actually worked, since the l2tp socket isn't an inet socket.

As David Miller points out:

  "If we wanted this to work, it'd have to look up the tunnel and then
   use tunnel->sk, but I wonder how useful that would be"

Since this can never have worked so nobody could possibly have depended
on that functionality, just remove the broken code and return -EINVAL.

Change-Id: I457d8aa95d3d71856c4961c32f958dfbfede3de7
Reported-by: Sasha Levin <sasha.levin@oracle.com>
Acked-by: James Chapman <jchapman@katalix.com>
Acked-by: David Miller <davem@davemloft.net>
Cc: Phil Turnbull <phil.turnbull@oracle.com>
Cc: Vegard Nossum <vegard.nossum@oracle.com>
Cc: Willy Tarreau <w@1wt.eu>
Cc: stable@vger.kernel.org
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Andy Seah <dntc46@motorola.com>
Reviewed-on: http://gerrit.mot.com/657098
Tested-by: Jira Key <jirakey@motorola.com>
Reviewed-by: Joel Voss <jvoss@motorola.com>
Reviewed-by: Jeffrey Carlyle <jeff.carlyle@motorola.com>
Submit-Approved: Jira Key <jirakey@motorola.com>
SLTApproved: Dmitry Sokolov <dima@motorola.com>
(cherry picked from commit c21df14e865068f8926e28f79464ac1314d967bd)
mmc: drive strength tuning

Implement a hook to allow a host to tune its interface when the driver
encounters a CRC error.  This can avoid an unnecessary throttle-back of
the bus speed if the error was due to impedance matching rather than bus
timing.

Change-Id: I87d1c7c4be9bae1c81325a162782c92a69161431
Signed-off-by: Russ Knize <Russ.Knize@motorola.com>
Reviewed-on: http://gerrit.mot.com/658199
Tested-by: Jira Key <jirakey@motorola.com>
SLTApproved: Christopher Fries <cfries@motorola.com>
Reviewed-by: Christopher Fries <cfries@motorola.com>
Submit-Approved: Jira Key <jirakey@motorola.com>
(cherry picked from commit 7df70b0e3613983b1eae802dcf8fc28cb9b80b9d)

Conflicts:
	include/linux/mmc/host.h
sdhci-msm: implement drive strength tuning

Implement a drive strength tuning hook that iterates through a list of
available drive strengths on each call.  Once the end of the list is
reached, return an error.  The list is provided via the device tree and
is currently only implemented for the CLK line.

Change-Id: Iec4a5e617ef6724d0c7a67d85ddfad256af3161d
Signed-off-by: Russ Knize <Russ.Knize@motorola.com>
Reviewed-on: http://gerrit.mot.com/658200
Tested-by: Jira Key <jirakey@motorola.com>
Reviewed-by: Christopher Fries <cfries@motorola.com>
SLTApproved: Christopher Fries <cfries@motorola.com>
Submit-Approved: Jira Key <jirakey@motorola.com>
(cherry picked from commit ee8978ccf1a93207692d483672b624d7795f2f79)
arm/dts: msm8926: SDC2 drive strength tuning

Add a list of drive strengths to try during the tuning process:
6mA, 8mA, and 4mA.

Change-Id: I24f16eadf74206698b2f56ba0058c37abe2e54f1
Signed-off-by: Russ Knize <Russ.Knize@motorola.com>
Reviewed-on: http://gerrit.mot.com/658201
Tested-by: Jira Key <jirakey@motorola.com>
SLTApproved: Christopher Fries <cfries@motorola.com>
Reviewed-by: Igor Kovalenko <igork@motorola.com>
Submit-Approved: Jira Key <jirakey@motorola.com>
(cherry picked from commit 4bfc21918bba91b7c60ad9689af1993ce86718d2)
mmc: improve CRC error accounting

Keep a running total of CRC errors encountered so that transient
failures are accounted for when deciding whether or not to tune
or throttle back the interface.

Change-Id: I150e9e3eefccd97743a5e25fb914f2546de91cac
Signed-off-by: Russ Knize <Russ.Knize@motorola.com>