PPC: perf enhancement: modify 64-bit object tagging scheme.

... such that tagged pointers are 4-byte aligned.  This allows
loads/stores of pointer-sized fields to be done via a single
instruction on Power platforms.  Previously 1-byte aligned tagged
pointers required a two instruction sequence to first align the
pointer and then access memory using an adjusted 4-byte aligned
immediate offset.

Conflicts:

	include/v8.h
	src/objects-inl.h
	src/objects.h
	src/ppc/assembler-ppc.cc
	src/ppc/macro-assembler-ppc.cc