ilo: allow for device-dependent format translation

Pass ilo_dev_info to all format translation functions.
ilo: use native 3-component vertex formats on GEN7.5+

GEN7.5 gains support for those formats natively.
ilo: share some code between {tex,buf}_create_bo

Add resource_get_bo_name() and resource_get_bo_initial_domain() for use by
both functions.
ilo: clean up resource bo renaming

s/alloc_bo/rename_bo/ as that is what the functions do.  Simplify bo
allocation and move the complexity to bo renaming.
ilo: check the tilings of imported handles

Just to be cautious.
mesa: add ARB_clear_texture.xml to file list, remove duplicate decls

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
nvc0: make sure that the local memory allocation is aligned to 0x10

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: <mesa-stable@lists.freedesktop.org>
nv50/ir: keep track of whether the program uses fp64

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
nvc0: mark shader header if fp64 is used

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
nv50/ir: fix hard-coded TYPE_U32 sized register

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
nv50/ir: fix phi/union sources when their def has been merged

In a situation where double-register values are used, the phi nodes can
still end up being u32 values. They all get merged into one RA node
though. When fixing up the merge (which comes after the phi node), the
phi node's def would get fixed, but not its sources which would remain
at the low register value.

This maintains the invariant that a phi node's defs and sources are
allocated the same register.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
mesa/st: add support for interpolate_at_* ops

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
gk110/ir: emit load constant subop

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
gm107/ir: emit LDC subops

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
nvc0/ir: support 2d constbuf indexing

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
i965: Improve dead control flow elimination.

... to eliminate an ELSE instruction followed immediately by an ENDIF.

instructions in affected programs:     704 -> 700 (-0.57%)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
i965/fs: Swap if/else conditions in SEL peephole.

Will clarify make the next commit easier to read.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
i965/fs: Decide predicate/predicate_inverse outside of the for loop.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Add an accelerated version of F_TO_I for x86_64

According to a quick micro-benchmark, this new version is 20% faster on my
Haswell laptop.

v2: Removed the XXX note about x86_64 from the comment
v3: Use an intrinsic instead of an __asm__ block.  This should give us MSVC
    support for free.
v4: Enable it for all x86_64 builds, not just with USE_X86_64_ASM

Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
winsys/radeon: fix indentation

Can we please keep it clean and avoid ending up in messy situation
like ddx.

Signed-off-by: Jérôme Glisse <jglisse@redhat.com>