Assignment 1 - Christine Schubert

You started your response with "I think," so I tried to investigate a bit. Verilog and C appear to have very similar syntax/inspiration, but I wasn't able to confirm that Verilog is actually implemented in C. That said, I didn't come up with an alternative either. Could it be possible that Verilog isn't really implemented in a "host language," but rather that a Verilog program is just a description of hardware that each Verilog simulator reads and uses however it wishes? In this case, it would almost seem that Verilog doesn't really have a host language (or perhaps that its host language is the language in which a given simulator is written). Admittedly, though, I haven't ever used or thought about Verilog before this assignment, so this is nothing more than reasoned speculation.