Fix bug in Load Paired so JitIL actually runs again.

Was broken in the PowerPCState Register PR a few days ago.
JitIL: Fix matching bug in Store Paired.

Most non-wii, non-mmu games run now.
DiscIO: Simplify GetUniqueID in VolumeDirectory
DiscIO: Get rid of some casts and a c_str call in VolumeDirectory
Include a missing include in the ARM emitter's common code.
Fix the return value of PPCAnalyst.
In situations where conditional continue isn't supported + if a JIT doesn't implement a instruction that has the FL_ENDBLOCK flag. This would cause an
infinite loop.
In reality all the JITs should implement every FL_ENDBLOCK instruction regardless, but JITIL doesn't implement tw/twi which are FL_ENDBLOCK
instructions.
Fix warnings.
Fix IsMMIOAddress Check.
Merge pull request #1056 from phire/IsMMIOAddress

Fix IsMMIOAddress Check.
Remove some unnecessary semicolons
Merge pull request #1036 from phire/save-jitil

Save JitIL! Fix bug so JitIL actually runs again.
Merge pull request #1058 from lioncash/semicolon

Remove some unnecessary semicolons
Merge pull request #1048 from lioncash/discio

DiscIO: Minor changes to VolumeDirectory.
Merge pull request #1051 from Sonicadvance1/ARM-Common

Include a missing include in the ARM emitter's common code.
Merge pull request #1052 from Sonicadvance1/fix-ppcAnalyst-return

Fix the return value of PPCAnalyst.
Merge pull request #1054 from comex/i-hate-warnings

Fix warnings.
Opportunistically predict BLR destinations using RET.

When executing a BL-type instruction, push the new LR onto the stack,
then CALL the dispatcher or linked block rather than JMPing to it.  When
executing BLR, compare [rsp+8] to LR, and RET if it's right, which it
usually will be unless the thread was switched out.  If it's not right,
reset RSP to avoid overflow.

This both saves a trip through the dispatcher and improves branch
prediction.

There is a small possibility of stack overflow anyway, which should
be handled... *yawn*
Shorten the blr stub a bit.
Run exception handlers on an alternate stack on Linux.

*Completely untested.*  Someone please test.
Reorganize backpatching a bit.  Untested on ARM.

Rather than *MemTools.cpp checking whether the address is in the
emulated range itself (which, as of the next commit, doesn't cover every
kind of access the JIT might want to intercept) and doing PC
replacement, they just pass the access address and context to
jit->HandleFault, which does the rest itself.

Because SContext is now in JitInterface, I wanted JitBackpatch.h (which
defines it) to be lightweight, so I moved TrampolineCache and associated
x64{Analyzer,Emitter} dependencies into its own file.  I hate adding new
files in three places, two of which are MSVC...

While I'm at it, edit a misleading comment.