target-arm: A64: Add 2-reg-misc REV* instructions

Add the byte-reverse operations REV64, REV32 and REV16 from the
two-reg-misc group.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target-arm: A64: Add FNEG and FABS to the SIMD 2-reg-misc group

Add the SIMD FNEG and FABS instructions in the SIMD 2-reg-misc group.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>