crypto: msm: Fix Uninitialized flags

Due to uninitialized "flags" field in the request structure,
incorrect choices are made in the qce driver layer with
regards to setting crypto hardware registers.

Initializing the flags fixes this incorrect setting of the
registers.

Change-Id: Ic40319ea5e15e66cbafd28f727a9bcc6ea41b1ca
Signed-off-by: Mona Hossain <mhossain@codeaurora.org>
crypto: msm: check potential integer overflow on AEAD req length
According to the specification of AEAD, AEAD request cryptlen is
not a Fixed maximum and assoclen is also same. This could lead to
potential integer overflow, thus allocating less memory. So we
need to check potential integer overflow on AEAD request length
crypto: msm: Fix issues related to non-zero byteoffset input
Fix buffer overflow for a non-zero byteoffset value.

Also fixes memory leak issue by adding data_len check in check_params.
One of the scenarios data_len can be less than byteoffset which results
in memory leak with huge data length, which might cause the kernel panic.
crypto: msm: Remove invalid check in qcedev driver
Unsigned int variable is compared to < 0, which is an invalid.
crypto: msm: Use scnprintf() instead of snprintf()

snprintf can return more than the size of buffer, which is not
expected here, obviously. Use scnprintf instead.

Change-Id: I3b97a016df910728dfef5a0914ab8ad67c68e39c
Signed-off-by: AnilKumar Chimata <anilc@codeaurora.org>
crypto: msm: Add support for setting ctx flags

Currently there is no way of instructing the crypto driver
to use HW specific capabilities. The kernel crypto framework
does not expose any API to set any specific HW feature flags:
ex: use of HW key,  use of PIPE keys, setting XTS data unit
size.

The driver currently uses a specific key pattern to decide
when to instruct HW to use HW_KEY (uses key pattern of all
zeros) and when to use PIPE_KEY (uses key pattern of all 0xF's).
This limits the use of the specific key pattern from ever being
used for any crypto operation.

Adding support for crypto client to set flags to indicate when
to use HW KEY, PIPE KEY, size removes the limitation on the key
patterns that can be used by the driver.

Adding XTS data unit size flags allows the client to take
advantage of the hardware capability to set data unit size
for XTS operations.

Change-Id: I0d1417a6d3c990e0750dbd90e3816f45fec8d693
Signed-off-by: Mona Hossain <mhossain@codeaurora.org>

Conflicts:

	drivers/crypto/msm/qce50.c
fbmem: Check failure of FBIOPUTCMAP ioctl

On FBIOPUTCMAP ioctl failure deallocate
fb cmap. Put null check for cmap red, green,
blue component.

Change-Id: I10468ee30d0e76c256cf3d7a6ffe14db7fd4511b
Signed-off-by: Pawan Kumar <pavaku@codeaurora.org>
iommu: msm: Handle unmapping of PTE properly

The unmap api is currently not handling unmapping of page table
entries (PTE) properly. The generic function that calls the msm
unmap API expects the unmap call to unmap as much as possible
and then return the amount that was unmapped.
In addition the unmap function does not support an arbitrary input
length. However, the function that calls the msm unmap function
assumes that this is supported.

Both these issues can cause mappings to not be unmapped which will
cause subsequent mappings to fail because the mapping already exists.

Change-Id: I638d5c38673abe297a701de9b7209c962564e1f1
Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
iommu: msm: Refactor page table code

Move code that is specific to short descriptor page table
format to its own file to allow sharing of header file
between long descriptor format page table and short descriptor
page table format.

Change-Id: Ia072a77a23d21207edb983de47b6fe69029ffdd7
Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
iommu: msm: Add standalone support for secure SMMU

Add a configuration option that allows for testing of systems without
a secure environment. When turning on this option all the IOMMUs will
be programmed by the kernel regardless of whether the IOMMU is secure
or not. This allows for early testing during bringup.

Change-Id: I34fde3ba74a69a1d3fb3e5efba3e02cbcc9272d4
Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
iommu: msm: Add cache maintenance for calls into TZ

The scm_call API is no longer providing implicit cache maintenance for
shared buffers. Add cache flushing for buffers heading towards TZ and
cache invalidation for buffers coming from TZ.

Change-Id: I21a60f912bf73daeaa9ade99c3af755db9665e25
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
iommu: msm: don't rely on structure format coming from TZ

The format of the secure fault register dump structure in TZ could
change over time. However, it should always adhere to the following
format (each row is 4 bytes wide):

    |-----------|
    | dump_size |
    | reg1_addr |
    | reg1_val  |
    | ...       |
    | regn_addr |
    | regn_val  |
    |-----------|

Rather than relying on the format of the structure, iterate over
the (addr, value) pairs.

Change-Id: I811c7781d6db11ef1eb07c0c1608b8db6978a758
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
iommu: msm: Only flush the exact list size

Before giving a list of memory chunks to trustzone, the list needs
to be flushed. The list is simply an array of physical addresses.
The current flush routine takes into account the size of the memory
chunk which is incorrect. The memory chunk size is not used in
calculating the list length since the list is a list of pointers.
Adjust the cache flushing routine to flush the actual size of the
list: size of each entry times the number of entries.

Change-Id: I3fbc7cb7e6c823823481b5fb205a1414e76150c9
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
iommu: msm: Refactor printing of page fault

Refactor the code that reads the registers during an IOMMU
page fault to make the code more maintainable and make it
easier to add support for new registers.

Change-Id: I6437754ee372a03344b307554e1e3a51dc810ddb
Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
iommu: msm: Add printing of 64 bits of TTBR0/1

When we get a page fault we print the value of TTBR0 and
TTBR1. However, we are only printing 32 bits of this 64
bit register.

Print the full 64 bits of this register which will be
helpful when debugging page fault issues.

Change-Id: I47963ff74daab98022250c54f80b87f130885e52
Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
msm: Fix for APR session based callbacks

In the callback function src_port was being used
instead of dest_port for returning the callbacks.
Fixed by changing src_port to dest_port.

Signed-off-by: Vicky Sehrawat <vickys@codeaurora.org>
Signed-off-by: Dan Trifan <jimsth@gmail.com>
msm: Allow native driver to communicate with APR

Add a new driver to expose IOCTLs for userspace clients
to use to communicate directly with APR. This will allow
clients to directly interact with services such MVM, CVS,
etc

Signed-off-by: Vicky Sehrawat <vickys@codeaurora.org>
Signed-off-by: Dan Trifan <jimsth@gmail.com>
msm: mdss: Adding lcd notifier

Supports notifier for start&end of LCD power on&off

Change-Id: Idaa685a2c554286da5f764519305d830c4d1a1bd
Signed-off-by: Se Hun Kim <sean2.kim@lge.com>
Signed-off-by: Jongrak Kwon <jongrak.kwon@lge.com>
Signed-off-by: Devin Kim <dojip.kim@lge.com>

Conflicts:
	drivers/video/msm/mdss/mdss_dsi.c
imx135 / fix GPIO Setting

Change-Id: I6f34fe8fba4696b3327166f1a716e00c5c380191
ARM: dts: g2-kddi: enable wifi-control-func

Change-Id: I0caf5b3d19cfb43c5bc3ba40236e07751a69a503