microblaze: Fix mmap for cache coherent memory

When running in non-cache coherent configuration the memory that was
allocated with dma_alloc_coherent() has a custom mapping and so there is no
1-to-1 relationship between the kernel virtual address and the PFN. This
means that virt_to_pfn() will not work correctly for those addresses and the
default mmap implementation in the form of dma_common_mmap() will map some
random, but not the requested, memory area.

Fix this by providing a custom mmap implementation that looks up the PFN
from the page table rather than using virt_to_pfn.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
zynq_xcomm_adv7511_defconfig: Enable AD5592R/AD5593R

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
drivers/iio/adc/ad9361: Revise RFPLL and BPBLL reference sale behavior

Fix BBPLL max PFD frequency (70MHz)
Default use reference doubler if the ext ref is <= 40MHz (previous < 40MHz)
This can cause more fractional spurs but will give better phase noise
performance. If you like to revert to the previous behavior you
can set: adi,trx-synthesizer-target-fref-overwrite-hz = <40000000>;
This will ensure that the scaled reference clock for RFPLL will never
exceed this value.
You may also use this property to further downscale the target
reference clock.

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
drivers/iio/adc/admc_ctrl.c: Fixed the sign of the channels.