Add a hardware test for setting and getting the FPSCR.

6xx_pem states that bits 1 and 2 of the FPSCR aren't set via mtfsfi.
With this hardware test this has been proven false, mtfsfi can set them to whatever it wants.

6xx_pem also states that bits 1 and 2 of the FPSCR can't be set via mtfsb0/1.
With this hardware test this has been proven to be true, these instructions can not set/clear these bits.

6xx_pem states that bit 20 is a reserved bit, that's all it says.
With this hardware test, this bit has been proven to only ever be zero and can't be set to anything else with any of these instructions.