R600/SI: Use S_BFE_I64 for 64-bit sext_inreg

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222012 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Match integer min / max instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222015 91177308-0d34-0410-b5e6-96231b3b80d8
Fix unused variable warning without asserts

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222017 91177308-0d34-0410-b5e6-96231b3b80d8
Add a blank line, NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222018 91177308-0d34-0410-b5e6-96231b3b80d8
IR: Take an LLVMContext in Metadata::Metadata()

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222019 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Fix verifier error from a branch on IMPLICIT_DEF

SIILowerI1Copies wasn't correctly handling this case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222020 91177308-0d34-0410-b5e6-96231b3b80d8
IR: Make MDString inherit from Metadata

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222022 91177308-0d34-0410-b5e6-96231b3b80d8
Remove redundant virtual on overriden functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222023 91177308-0d34-0410-b5e6-96231b3b80d8
[dwarfdump] Handle relocations in Dwarf accelerator tables

ELF targets (and maybe COFF) use relocations when referring
to strings in the .debug_str section. Handle that in the
accelerator table dumper. This commit restores the
test/DebugInfo/cross-cu-inlining.ll test to its expected
platform independant form, validating that the fix works
(this test failed on linux boxes).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222029 91177308-0d34-0410-b5e6-96231b3b80d8
yaml2obj, COFF: Correctly calculate SizeOfImage and SizeOfHeaders

SizeOfHeaders must be aligned to the FileAlignment.
SizeOfImage must be at least the SizeOfHeaders aligned to the
SectionAlignment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222030 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Combine min3/max3 instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222032 91177308-0d34-0410-b5e6-96231b3b80d8
COFF: Add support for Dwarf accelerator tables.

This allows COFF targets to emit accelerator tables
when requested by -dwarf-accel-tables=Enable instead
of aborting. The test DebugInfo/cross-cu-inlining.ll
covers this on COFF platforms.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222034 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Fix spilling of m0 register

If we have spilled the value of the m0 register, then we need to restore
it with v_readlane_b32 to a regular sgpr, because v_readlane_b32 can't
write to m0.

v_readlane_b32 can't write to m0, so

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222036 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Mark s_movk_i32 as rematerializable

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222037 91177308-0d34-0410-b5e6-96231b3b80d8
Change order of tablegen generated fast-isel instruction code to be
based on instruction complexity

The order that tablegen fast-isel instruction code is generated is
currently based on the text of the predicate (using string
less-than). This patch changes this to instead use the instruction
complexity. Because the complexities are not unique a C++ multimap is
used instead of a map.

This fixes the problem where code with no predicate always comes out
first (the empty string always compares as less than all other
strings) thus making the code with predicates dead code. See the FMUL
code in PPCFastISel.cpp for an example. It also more closely matches
the normal codegen ordering. Some error checking in the tablegen
fast-isel code is fixed as well.

Patch by Bill Seurer.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222038 91177308-0d34-0410-b5e6-96231b3b80d8
Reapply r221924: "[GVN] Perform Scalar PRE on gep indices that feed loads before
doing Load PRE"

This commit updates the failing test in
Analysis/TypeBasedAliasAnalysis/gvn-nonlocal-type-mismatch.ll

The failing test is sensitive to the order in which we process loads.  This
version turns on the RPO traversal instead of the while DT traversal in GVN.
The new test code is functionally same just the order of loads that are
eliminated is swapped.

This new version also fixes an issue where GVN splits a critical edge and
potentially invalidate the RPO/DT iterator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222039 91177308-0d34-0410-b5e6-96231b3b80d8
InstCombine: Fix infinite loop caused by visitFPTrunc

We would attempt to replace a fptrunc of an frem with an identical
fptrunc.  This would cause the new fptrunc to be added to the worklist.
Of course, this results in an infinite loop because we will keep
visiting the newly created fptruncs.

This fixes PR21576.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222040 91177308-0d34-0410-b5e6-96231b3b80d8
Add a test for r222029 that doesn't rely on the default target being a COFF platform.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222041 91177308-0d34-0410-b5e6-96231b3b80d8
Add the code and test cases for 64-bit ARM to llvm-objdump’s Mach-O symbolizer.

FYI, removed the unused MCInstrAnalysis as it does not exist for 64-bit ARM and
was causing a “couldn't initialize disassembler for target” error.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222045 91177308-0d34-0410-b5e6-96231b3b80d8
Turn a leaked object into a stack variable instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222046 91177308-0d34-0410-b5e6-96231b3b80d8