[ARM] vgic: Don't use maintainence interrupt for EOIed LRs

Currently, we programme LR registers such that we get maintainence
interrupt for EOIed level-triggered interrupt. Unfortunately most
of the ARM Guest interrupts are generally level-triggered hence
we get a maintainence interrupt for every interrupt injected to
Guest VCPU and we re-claime EOIed LRs when processing maintainence
interrupt. Due to this kind of maintainence interrupt usage we
end-up wasting lot of CPU time in processing maintainence interrupt.

This patch improves the VGIC code by avoiding usage of maintainence
interrupt for re-claiming EOIed LRs. Now instead of maintainence
interrupt we re-claim EOIed LRs when injecting virtual interrupt
in vgic_handle_irq().

Signed-off-by: Anup Patel <anup@brainfault.org>