ARM: sunxi: Add sun8i (A23) UART0 pin mux support

UART0 pin muxes on the A23 have a different function value.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
mmc: sunxi: Add support for sun8i (A23)

The Allwinner A23 SoC has reset controls like the A31 (sun6i).
The FIFO address is also the same as sun6i.

Re-use code added for sun6i.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
ARM: sunxi: Add support for R_PIO gpio banks

The A31, A23 and later SoCs have an extra pin controller, called CPUs_PIO
or R_PIO, which handles pin banks L and beyond.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
[wens@csie.org: expanded commit message]
[wens@csie.org: add pin bank M and expand comments]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
ARM: sunxi: Allow specifying module in prcm apb0 init function

The prcm apb0 controls multiple modules. Allow specifying which
modules to enable clocks and de-assert resets so the function
can be reused.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
ARM: sunxi: Add support for using R_UART as console

The A23 only has UART0 muxed with MMC0. Some of the boards we
encountered expose R_UART as a set of pads.

Add support for R_UART so we can have a console while using mmc.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
ARM: sunxi: Add basic A23 support

The basic blocks of the A23 are similar to the A31 (sun6i). Re-use
sun6i code for initial clock, gpio, and uart setup.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>