[TASK] Remove ipcore drivers from repository

Change-Id: I70d97150f2e9dfeeb38c7defbea2dd4e097156d5
Reviewed-on: http://brateggevoat1/gerrit/1843
Tested-by: Jenkins <jenkins@brateggevoat1.br-automation.co.at>
Reviewed-by: Thomas Mair <thomas.mair@br-automation.com>
Reviewed-by: Joerg Zelenka <joerg.zelenka@br-automation.com>
[TASK] Add Ethernet packet generator

Change-Id: I7f4267b6012e900df6a729bdf30f6d53c45af4bd
Reviewed-on: http://brateggevoat1/gerrit/1954
Reviewed-by: Joerg Zelenka <joerg.zelenka@br-automation.com>
Tested-by: Jenkins <jenkins@brateggevoat1.br-automation.co.at>
[TASK] Move DPRAM components in memory subdirectory

Change-Id: Ibacd225ee8d9b32c49989ae14ef4bd1d37a8ea80
Reviewed-on: http://brateggevoat1/gerrit/2009
Tested-by: Jenkins <jenkins@brateggevoat1.br-automation.co.at>
Reviewed-by: Thomas Mair <thomas.mair@br-automation.com>
Reviewed-by: Joerg Zelenka <joerg.zelenka@br-automation.com>
[FEATURE] Create libraries for common vhdl sources

- Create libcommon for sources in common/lib/src
- Create libutil for sources in common/util/src
- Remove common/lib/src from ipcores (*_hw.tcl and *.pao)
- Update library and use commands in all sources that use the libraries
- Add libcommon as Altera *.qip and Xilinx *.pao
- Add script to compile the libraries with Modelsim
- Rework simulation script to invoke library compilation before simulation
- Add release script for libcommon
- Update ipcore release scripts

Change-Id: Ic2e77635f7d58e59d394eca0e35abde19fa13e9a
Reviewed-on: http://brateggevoat1/gerrit/2010
Tested-by: Jenkins <jenkins@brateggevoat1.br-automation.co.at>
Reviewed-by: Sebastian Muelhausen <sebastian.muelhausen@br-automation.com>
Reviewed-by: Thomas Mair <thomas.mair@br-automation.com>
Reviewed-by: Joerg Zelenka <joerg.zelenka@br-automation.com>
[FIX] Avoid possible conflicts with dpram entity name

Change-Id: Ibf5c3164866b0e5a67fadfeff09425adc0afedc5
Reviewed-on: http://brateggevoat1/gerrit/2013
Tested-by: Jenkins <jenkins@brateggevoat1.br-automation.co.at>
Reviewed-by: Sebastian Muelhausen <sebastian.muelhausen@br-automation.com>
Reviewed-by: Joerg Zelenka <joerg.zelenka@br-automation.com>
[FIX] Fix log dualis function in global.vhd

Assign default value 0 to resulting variable. This fix returns 0 in case
of input 0 or 1.

Change-Id: Ic66e96985e38a9b16f353fd143d5ede6cb97c110
Reviewed-on: http://brateggevoat1/gerrit/2075
Tested-by: Jenkins <jenkins@brateggevoat1.br-automation.co.at>
Reviewed-by: Sebastian Muelhausen <sebastian.muelhausen@br-automation.com>
Reviewed-by: Joerg Zelenka <joerg.zelenka@br-automation.com>
[TASK] Merge Tpdo and Rpdo memory buffer in host interface

In order to reduce resources the Rpdo and Tpdo memory buffers are merged.
This reduces bridge circuit complexity.

Change-Id: I8a21cbaf647cc554bd544515c7353ff8ccf5a2b9
Reviewed-on: http://brateggevoat1/gerrit/2143
Tested-by: Jenkins <jenkins@brateggevoat1.br-automation.co.at>
Reviewed-by: Joerg Zelenka <joerg.zelenka@br-automation.com>
[TASK] Merge Tpdo and Rpdo memory buffer in Altera host interface

* Adapt to changes in common host interface sources
* Merge Tpdo and Rpdo in tcl scripts

Change-Id: I728a1f43166dc9a9b9aabf82370cc30b262580db
Reviewed-on: http://brateggevoat1/gerrit/2144
Tested-by: Jenkins <jenkins@brateggevoat1.br-automation.co.at>
Reviewed-by: Joerg Zelenka <joerg.zelenka@br-automation.com>
[FEATURE] Add data latch component

- Add general entity for data latch
- Add architecture for Altera and Xilinx primitives

Change-Id: I93c6b8c4e165c019b2048228dbaf9b9e1e1c08be
Reviewed-on: http://brateggevoat1/gerrit/2157
Tested-by: Jenkins <jenkins@brateggevoat1.br-automation.co.at>
Reviewed-by: Joerg Zelenka <joerg.zelenka@br-automation.com>
[FEATURE] Add parallel multiplexed address/data bus

- Add master and slave ipcore
- Add testbench
- Add Qsys components

Change-Id: I11c211e4c5f5f462c0f3538c6e0f931655359b13
Reviewed-on: http://brateggevoat1/gerrit/2158
Tested-by: Jenkins <jenkins@brateggevoat1.br-automation.co.at>
Reviewed-by: Joerg Zelenka <joerg.zelenka@br-automation.com>
[TASK] Revise simulation script

- Add load-all-libs.sh
- call load-all-libs.sh in simulate.sh

Change-Id: I1d7e6a3537da64fd582851bf9795169a286162a5
Reviewed-on: http://brateggevoat1/gerrit/2159
Tested-by: Jenkins <jenkins@brateggevoat1.br-automation.co.at>
Reviewed-by: Joerg Zelenka <joerg.zelenka@br-automation.com>
[FIX] Fix address based read operation on status and Control register

Add Read signal from Host/PCP to control the read operations for Register read
operations.

Change-Id: I273d90cd2bba325801c79f3367a8d2adc05e5976
Reviewed-on: http://brateggevoat1/gerrit/2160
Tested-by: Jenkins <jenkins@brateggevoat1.br-automation.co.at>
Reviewed-by: Joerg Zelenka <joerg.zelenka@br-automation.com>
[FIX] Fix wrong oHostWaitrequest generation for invalid Address

- Increase the priority for the invalid address operation to higher than Bridge Enable
- Generate oHostWaitrequest based on Read/Write signal from Host

Change-Id: I0c484001f7ed608bbadfc78de7aeef8ee72712cf
Reviewed-on: http://brateggevoat1/gerrit/2161
Tested-by: Jenkins <jenkins@brateggevoat1.br-automation.co.at>
Reviewed-by: Joerg Zelenka <joerg.zelenka@br-automation.com>
[FIX] Remove TODO for sensitivity list

Sensitivity list is complete therefore the TODO comment can be removed.

Change-Id: I2ac38b937a04fd1e7935eff7d135c74e75dc2728
Reviewed-on: http://brateggevoat1/gerrit/2162
Tested-by: Jenkins <jenkins@brateggevoat1.br-automation.co.at>
Reviewed-by: Joerg Zelenka <joerg.zelenka@br-automation.com>
[FIX] Reduce simulator resource utilization of memory model

Large memory models need quite much resources if described with signals.
Therefore a variable is used instead.

Change-Id: Ib36ca0bbca3583967affc0e29670d55aaa98efbc
Reviewed-on: http://brateggevoat1/gerrit/2163
Tested-by: Jenkins <jenkins@brateggevoat1.br-automation.co.at>
Reviewed-by: Joerg Zelenka <joerg.zelenka@br-automation.com>
[FEATURE] Add axi lite master and slave wrappers

Add AXI lite slave and master wrapper implementation independent of any
hardware platform. The wrapper converts AXI lite to Avalon protocol transfers.

Change-Id: Ic962f610e846d3a737765484ac2b38851c29cbee
Reviewed-on: http://brateggevoat1/gerrit/2164
Tested-by: Jenkins <jenkins@brateggevoat1.br-automation.co.at>
Reviewed-by: Joerg Zelenka <joerg.zelenka@br-automation.com>
[FEATURE] Add axi host interface toplevel

The axi host interface toplevel applies the axi wrappers to convert
the master and slave interfaces to axi lite.

Change-Id: I94a30a306fcb04bb524076c5fb1ecd717028d478
Reviewed-on: http://brateggevoat1/gerrit/2165
Tested-by: Jenkins <jenkins@brateggevoat1.br-automation.co.at>
Reviewed-by: Joerg Zelenka <joerg.zelenka@br-automation.com>
[FEATURE] Add axi host interface XPS pcore

- Add pcores support for XPS
- Add HW/SW interface TCL script generating parameters in xparameters.h

Change-Id: I0ac26685820ba8aa7f173ef1a035f55ca284f8ed
Reviewed-on: http://brateggevoat1/gerrit/2166
Tested-by: Jenkins <jenkins@brateggevoat1.br-automation.co.at>
Reviewed-by: Joerg Zelenka <joerg.zelenka@br-automation.com>
[TASK] Update host interface release script

Change-Id: I04f00fb145ad533b0e865b9d2559b94d715f9805
Reviewed-on: http://brateggevoat1/gerrit/2167
Tested-by: Jenkins <jenkins@brateggevoat1.br-automation.co.at>
Reviewed-by: Joerg Zelenka <joerg.zelenka@br-automation.com>
[FEATURE] Add waveform documentation to axiwrappers

Add wavedrom files for master/slave writes and reads.

Change-Id: I832802d9d32a6b3a9584a14d61de78ef7f63f837
Reviewed-on: http://brateggevoat1/gerrit/2168
Tested-by: Jenkins <jenkins@brateggevoat1.br-automation.co.at>
Reviewed-by: Joerg Zelenka <joerg.zelenka@br-automation.com>