board: routing WIP.

I can't actually remember what changed in this commit.  Perhaps it was
just forward-annotation from schematic fixes in previous commit.
board: routing WIP; thick power traces, reaching more devices.
board: 6522 VIA PORTA routed.
board: 6522 VIA PORTB routed.
board: USB socket closer to edge; routing adjusted.
board: routed 40-pin expansion header ADDRESS pins to 6502.
board: routing WIP: 5V edge lines shifted in.
board: re-routed expansion port address lines to 6502.
board: routed expansion port DATA to 6522.
board: further routing, placement adjustments.
board: routing fine-tuned around expansion port.
board: PORTB bumped north; fine trace width normalized, tweaks.
schematic, board: added 0.1 uF cap on 5V expansion pin 20.
board: routed ADDR[0..7, 12] down left side of board.
board: trace spacing less tight; 0.025 grid for most routing.
board: 6502 moved 50 mils left; more space in center.
board: more routing from 6502 to memory.
board: routing progress and improvements; 34 airwires.
board: routed PHI2; 30 airwires.
routing: checkpoint; 26 airwires.