logic2/
	base.py: Modified event to include destination pin.
                 Overridable pin base name in Base object.
                 Pin comparitor function.
                 Implement input event processing in Base.
                 Base becomes ABC, raises Notimplement on execuet.
                 Implement process outputs in Base.
                 Create a addr_range function to produce pindefs for addressable objects.
                 Add AddressableMixin for adding addressing input pins to other objects.
                 Impelement NOT object using inverter map.
        gate.py: Implement basic gates (AND, OR, NOR, NAND, XOR, XNOR using LUT base class.
	clock.py: Implement tickwise clock object.
	lut.py: Implement generic Look Up Table gate.
	mux.py: Implement generic Multiplexer/Demultiplexer gates.
	simulator.py: Unfinished container classes / WIP.
  testlogic.py: Begun implementing basic tests for the new versions of logic simulator.