i have to review the modifications
found some things missing
test
added chipscope, testing
change the order
test fix
test fix
test fix
test
added no chipscope all constraints met bitfile
fix the synchronization issue in the tx waiting data and return huge page
remove send_last and send_tail signals
added support for 256 bytes tlps
fixed signal name
fixed signal name
fixed signal name
reviewed modifications.
rom won't be read from the host
tlp tag is 5 bit width
test 256 byte tlp, removed signals in rx
.removed reset of trn_td and trn_trem
.solved (?) isssue of the host memory addressing
.added hw dropped rx packets to huge page header
.added rx timestamping support in hw
.modified and unified synchoronization modules