CHROMIUM: iwl7000: mac80211: use bss_conf->dtim_period instead of conf.ps_dtim_period

sta_set_sinfo is obviously takes data for specific station.
This specific station is attached to a specific virtual
interface. Hence we should use the dtim_period from this
virtual interface rather than the system wide dtim_period.

BUG=chrome-os-partner:30201
TEST=run network_WiFi_DTIMPeriod test (many times)

Change-Id: I8a49582b1db046f07445b2381d1790a102c16930
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/214280
Reviewed-by: Paul Stewart <pstew@chromium.org>
Reviewed-by: Matt Chen <matt.chen@intel.com>
CHROMIUM: iwl7000: mvm: use bss_conf->dtim_period instead of conf.ps_dtim_period

The latter is meant for software implementation of power
save and is not per-virtual interface. Since our driver
supports multiple virtual interfaces, we need to use
vif->bss_conf.dtim_period.

BUG=chrome-os-partner:30201
TEST=run network_WiFi_DTIMPeriod test (many times)

Change-Id: Ida5656eec686deb606bf144e4d16ee391f59c1a5
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/214281
Reviewed-by: Paul Stewart <pstew@chromium.org>
Reviewed-by: Matt Chen <matt.chen@intel.com>
CHROMIUM: config: re-normalize split configs, keeping iwl7000

Run:
  ./chromeos/scripts/kernelconfig oldconfig
  git show 1b3f7a0f16215acef99743bc595ef5b29dac4f65 | patch -p1

BUG=None
TEST=None

Change-Id: I13f942a94c88906c0dee8b56ba64a2c7b3bc1e00
Signed-off-by: David Riley <davidriley@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/214276
Reviewed-by: Olof Johansson <olofj@chromium.org>
Reviewed-by: Benson Leung <bleung@chromium.org>
CHROMIUM: soc/tegra: pmc: move to using a restart handler

The pmc driver was previously using arm_pm_restart to register
a restart handler which took precedence over the restart handlers
registered through register_restart_handler().

BUG=chrome-os-partner:31528
TEST="reboot" works

Change-Id: I4546e7d5af2b34b3562f7125480482f8ea36fb3f
Signed-off-by: David Riley <davidriley@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/214277
Reviewed-by: Olof Johansson <olofj@chromium.org>
Reviewed-by: Benson Leung <bleung@chromium.org>
Reviewed-by: Anatol Pomazau <anatol@google.com>
UPSTREAM: gpio: make gpiod_direction_output take a logical value

The documentation was not clear about whether
gpio_direction_output should take a logical value or the physical
level on the output line, i.e. whether the ACTIVE_LOW status
would be taken into account.

This converts gpiod_direction_output to use the logical level
and adds a new gpiod_direction_output_raw for the raw value.

BUG=chrome-os-partner:31528
TEST=gpio-restart changes do not reboot machine at boot

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
(cherry picked from commit ef70bbe1aaa612f75360e5df5952fddec50b7ca9)
Signed-off-by: David Riley <davidriley@chromium.org>

Change-Id: Ib9c6eb77a2f8fbba9be00032a50fbef63c440d81
Reviewed-on: https://chromium-review.googlesource.com/214278
Reviewed-by: Olof Johansson <olofj@chromium.org>
Tested-by: David Riley <davidriley@chromium.org>
Commit-Queue: David Riley <davidriley@chromium.org>
Reviewed-by: Benson Leung <bleung@chromium.org>
Reviewed-by: Anatol Pomazau <anatol@google.com>
BACKPORT: FROMLIST: power: Add simple gpio-restart driver

This driver registers a restart handler to set a GPIO line high/low
to reset a board based on devicetree bindings.

BUG=chrome-os-partner:31528
TEST=reboot on ryu results with coreboot netboot returns to netboot (doesn't enter recovery mode)

Change-Id: Ib5a08ed827899c7405397a522fa63edf03aaa54e
(from list https://patchwork.kernel.org/patch/4784611/)
Signed-off-by: David Riley <davidriley@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/214321
Reviewed-by: Olof Johansson <olofj@chromium.org>
Reviewed-by: Anatol Pomazau <anatol@google.com>
CHROMIUM: config: arm64: Enable CONFIG_POWER_RESET_GPIO_RESTART

BUG=chrome-os-partner:31528
TEST=none

Change-Id: I09a51f67523b4cac2d2f69fac6f10d9f6b1badbf
Signed-off-by: David Riley <davidriley@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/214279
Reviewed-by: Olof Johansson <olofj@chromium.org>
Reviewed-by: Anatol Pomazau <anatol@google.com>
Revert "BACKPORT: drm/i915/vlv: WA for Turbo and RC6 to work together."

This reverts commit 4ae66cbc312c64d42623622a42f51c62b90b2509.

We want to pull in the upstream v6 of this patch, rather than the v2 of
this patch that was pulled in off the ML

Signed-off-by: James Ausmus <james.ausmus@intel.com>

BUG=None
TEST=WebGL Aquarium with 100 fish runs at 60 fps versus ~20 fps
TEST=frequeny values in /sys/class/drm/card0 are correct
TEST=RC6 shows expected values as reported by powertop

Change-Id: I790e9979068238e5f249884a253e880a722b5a9f
Reviewed-on: https://chromium-review.googlesource.com/211207
Reviewed-by: Bernie Thompson <bhthompson@chromium.org>
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Reviewed-by: Joe Konno <joe.konno@linux.intel.com>
Commit-Queue: Joe Konno <joe.konno@linux.intel.com>
Tested-by: Joe Konno <joe.konno@linux.intel.com>
BACKPORT: drm/i915: Update rps interrupt limits

sysfs changes to rps min and max delay were only triggering an update
of the rps interrupt limits if the active delay required an update.
This change ensures that interrupt limits are always updated.

v2: correct compile issue missed on rebase
v3: add igt testcases to signed-off-by section

Testcase: igt/pm_rps/min-max-config-idle
Testcase: igt/pm_rps/min-max-config-loaded
Signed-off-by: Jeff McGee <jeff.mcgee@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
(cherry picked from commit b8a5ff8d7c676a04e0da5ec16bb068dd39459042)
Signed-off-by: Wayne Boyer <wayne.boyer@intel.com>

BUG=None
TEST=WebGL Aquarium with 100 fish runs at 60 fps versus ~20 fps
TEST=frequeny values in /sys/class/drm/card0 are correct
TEST=RC6 shows expected values as reported by powertop

Change-Id: I2435c3b0047fb781051b0aaca517ffd1511fe023
Reviewed-on: https://chromium-review.googlesource.com/206683
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Reviewed-by: Joe Konno <joe.konno@linux.intel.com>
Commit-Queue: Joe Konno <joe.konno@linux.intel.com>
Tested-by: Joe Konno <joe.konno@linux.intel.com>
BACKPORT: drm/i915: Restore rps/rc6 on reset

A check of rps/rc6 state after i915_reset determined that the ring
MAX_IDLE registers were returned to their hardware defaults and that
the GEN6_PMIMR register was set to mask all interrupts. This change
restores those values to their pre-reset states by re-initializing
rps/rc6 in i915_reset. A full re-initialization was opted for versus
a targeted set of restore operations for simplicity and maintain-
ability. Note that the re-initialization is not done for Ironlake,
due to a past comment that it causes problems.

Also updated the rps initialization sequence to preserve existing
min/max values in the case of a re-init. We assume the values were
validated upon being set and do not do further range checking. The
debugfs interface for changing min/max was updated with range
checking to ensure this condition (already present in sysfs
interface).

v2: fix rps logging to output hw_max and hw_min, not rps.max_delay
    and rps.min_delay which don't strictly represent hardware limits.
    Add igt testcase to signed-off-by section.

Testcase: igt/pm_rps/reset
Signed-off-by: Jeff McGee <jeff.mcgee@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
(cherry picked from commit dd0a1aa19bd3d7203e58157b84cea78bbac605ac)
Signed-off-by: Wayne Boyer <wayne.boyer@intel.com>

BUG=None
TEST=WebGL Aquarium with 100 fish runs at 60 fps versus ~20 fps
TEST=frequeny values in /sys/class/drm/card0 are correct
TEST=RC6 shows expected values as reported by powertop

Change-Id: I2d13149d8320165c3138cfd569634cc38d2a9f07
Reviewed-on: https://chromium-review.googlesource.com/203864
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Reviewed-by: Joe Konno <joe.konno@linux.intel.com>
Commit-Queue: Joe Konno <joe.konno@linux.intel.com>
Tested-by: Joe Konno <joe.konno@linux.intel.com>
BACKPORT: drm/i915: delay master/sarea deref for legacy ioctls

... past the check for DRIVER_MODESET. Avoids races with userspace
opening a master and our sarea setup.

Cc: Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
(cherry picked from commit 4d10cc0f861ed776f6cf953fd1df933c8b5c9812)
Signed-off-by: Wayne Boyer <wayne.boyer@intel.com>

BUG=None
TEST=WebGL Aquarium with 100 fish runs at 60 fps versus ~20 fps
TEST=frequeny values in /sys/class/drm/card0 are correct
TEST=RC6 shows expected values as reported by powertop

Change-Id: I6f5c7cc093521f9dff572453324a3cfbc48b4b7c
Reviewed-on: https://chromium-review.googlesource.com/203865
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Reviewed-by: Joe Konno <joe.konno@linux.intel.com>
Commit-Queue: Joe Konno <joe.konno@linux.intel.com>
Tested-by: Joe Konno <joe.konno@linux.intel.com>
BACKPORT: drm/i915: Track the enabled PM interrupts in dev_priv.

When we use different rps events for different platforms or due to wa,
we might end up needing this logic in a lot of places. Instead of
this let's use a variable in dev_priv to track the enabled PM
interrupts.

v2: Initialize pm_rps_events in intel_irq_init() (Ville).

Signed-off-by: Deepak S <deepak.s@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
[danvet: Frob the commit message a bit since the English was a bit too
garbled ;-) ]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

(cherry picked from commit a6706b45a57a23a613b34793e1414991b60a09c1)
Signed-off-by: James Ausmus <james.ausmus@intel.com>

Conflicts:
	drivers/gpu/drm/i915/i915_drv.h
	(context changes)

BUG=None
TEST=WebGL Aquarium with 100 fish runs at 60 fps versus ~20 fps
TEST=frequeny values in /sys/class/drm/card0 are correct
TEST=RC6 shows expected values as reported by powertop

Change-Id: I53b259d95a94ee9f29bac2a4eebbf87ac9f58daa
Reviewed-on: https://chromium-review.googlesource.com/203866
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Reviewed-by: Joe Konno <joe.konno@linux.intel.com>
Commit-Queue: Joe Konno <joe.konno@linux.intel.com>
Tested-by: Joe Konno <joe.konno@linux.intel.com>
BACKPORT: drm/i915: Reorganize the overclock code

The existing code (which I changed last) was very convoluted. I believe
it was attempting to skip the overclock portion if the previous pcode
write failed. When I last touched the code, I was preserving this
behavior. There is some benefit to doing it that way in that if the
first pcode access fails, the later is likely invalid.

Having a bit more confidence in my understanding of how things work, I
now feel it's better to have clear, readable, code than to try to skip
over this one operation in an unusual case.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
(cherry picked from commit d060c1695345df6c82b5253acb7055698b2bf002)
Signed-off-by: Wayne Boyer <wayne.boyer@intel.com>

BUG=None
TEST=WebGL Aquarium with 100 fish runs at 60 fps versus ~20 fps
TEST=frequeny values in /sys/class/drm/card0 are correct
TEST=RC6 shows expected values as reported by powertop

Change-Id: I6ccc48e7e94bef25ad9e3adf0b9957a6adb24d91
Reviewed-on: https://chromium-review.googlesource.com/203867
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Reviewed-by: Joe Konno <joe.konno@linux.intel.com>
Commit-Queue: Joe Konno <joe.konno@linux.intel.com>
Tested-by: Joe Konno <joe.konno@linux.intel.com>
BACKPORT: drm/i915: Fix coding style for RPS

Introduced:
commit b8a5ff8d7c676a04e0da5ec16bb068dd39459042
Author: Jeff McGee <jeff.mcgee@intel.com>
Date:   Tue Feb 4 11:37:01 2014 -0600

    drm/i915: Update rps interrupt limits

Cc: Jeff McGee <jeff.mcgee@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
(cherry picked from commit 5a953add43ea62e862ba15b7f969cd838e456949)
Signed-off-by: Wayne Boyer <wayne.boyer@intel.com>

Conflicts:
	drivers/gpu/drm/i915/i915_sysfs.c

BUG=None
TEST=WebGL Aquarium with 100 fish runs at 60 fps versus ~20 fps
TEST=frequeny values in /sys/class/drm/card0 are correct
TEST=RC6 shows expected values as reported by powertop

Change-Id: Iab0d5f558397ac32684bbb5708be65671eae1d68
Reviewed-on: https://chromium-review.googlesource.com/203868
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Reviewed-by: Joe Konno <joe.konno@linux.intel.com>
Commit-Queue: Joe Konno <joe.konno@linux.intel.com>
Tested-by: Joe Konno <joe.konno@linux.intel.com>
UPSTREAM: drm/i915: Store the HW min frequency as min_freq

this leaves a temporarily awkward min_delay (the soft limit) with the
new min_freq (the hardware limit). It's fixed in the next patch.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
(cherry picked from commit 1f05c944e007809d7040a1cc87b16934fedd23f6)

BUG=None
TEST=WebGL Aquarium with 100 fish runs at 60 fps versus ~20 fps
TEST=frequeny values in /sys/class/drm/card0 are correct
TEST=RC6 shows expected values as reported by powertop

Change-Id: Ic2038dc5e18f3cdc1c66e94ce87f8b23f503dc60
Reviewed-on: https://chromium-review.googlesource.com/211208
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Reviewed-by: Joe Konno <joe.konno@linux.intel.com>
Commit-Queue: Joe Konno <joe.konno@linux.intel.com>
Tested-by: Joe Konno <joe.konno@linux.intel.com>
BACKPORT: drm/i915: Rename and comment all the RPS *stuff*

The names of the struct members for RPS are stupid. Every time I need to
do anything in this code I have to spend a significant amount of time to
remember what it all means. By renaming the variables (and adding the
comments) I hope to clear up the situation. Indeed doing this make some
upcoming patches more readable.

I've avoided ILK because it's possible that the naming used for Ironlake
matches what is in the docs. I believe the ILK power docs were never
published, and I am too lazy to dig them up.

v2: leave rp0, and rp1 in the names. It is useful to have these limits
available at times. min_freq and max_freq (which may be equal to rp0, or
rp1 depending on the platform) represent the actual HW min and max.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
(cherry picked from commit b39fb2977392c0a996700bb9b8416a7b2ecce8fd)
Signed-off-by: James Ausmus <james.ausmus@intel.com>

Conflicts:
	drivers/gpu/drm/i915/i915_drv.h
	(context changes)

BUG=None
TEST=WebGL Aquarium with 100 fish runs at 60 fps versus ~20 fps
TEST=frequeny values in /sys/class/drm/card0 are correct
TEST=RC6 shows expected values as reported by powertop

Change-Id: Id4524571347e6db496ed05853f4e2ccdfaff5d57
Reviewed-on: https://chromium-review.googlesource.com/203869
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Reviewed-by: Joe Konno <joe.konno@linux.intel.com>
Commit-Queue: Joe Konno <joe.konno@linux.intel.com>
Tested-by: Joe Konno <joe.konno@linux.intel.com>
BACKPORT: drm/i915: Remove extraneous MMIO for RPS

The values created at initialization must always exist to use the
interface. Reading them again is confusing, and pointless.

More cleanups are coming in the next patch. Since I am not 100% certain,
moreover on BYT, (though I am extremely close to that) that there is no
need to leave the MMIO here, I wanted to make it a separate patch for
the bisectable 'just-in-case'

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
(cherry picked from commit 04da7e77e2cb8eadb84e12ecae3398e2a5b9ba70)
Signed-off-by: Wayne Boyer <wayne.boyer@intel.com>

BUG=None
TEST=WebGL Aquarium with 100 fish runs at 60 fps versus ~20 fps
TEST=frequeny values in /sys/class/drm/card0 are correct
TEST=RC6 shows expected values as reported by powertop

Change-Id: Ibd8881fc94f7de6ad7c7a2f4f44522c6a0400dac
Reviewed-on: https://chromium-review.googlesource.com/203870
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Reviewed-by: Joe Konno <joe.konno@linux.intel.com>
Commit-Queue: Joe Konno <joe.konno@linux.intel.com>
Tested-by: Joe Konno <joe.konno@linux.intel.com>
BACKPORT: drm/i915: remove rps local variables

With the renamed RPS struct members, it's easier to skip the local
variables which no longer clarify anything, and if anything just make
the code harder to read.

The real motivation for this patch is actually the next patch, which
attempts to consolidate some of the functionality.

Cc: Jeff McGee <jeff.mcgee@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
(cherry picked from commit 2a5913a8670a6925c04e397e0a8ebd72cb4b2d26)
Signed-off-by: Wayne Boyer <wayne.boyer@intel.com>

BUG=None
TEST=WebGL Aquarium with 100 fish runs at 60 fps versus ~20 fps
TEST=frequeny values in /sys/class/drm/card0 are correct
TEST=RC6 shows expected values as reported by powertop

Change-Id: If44a356c125e5a8372e8c0f6f52fc64849b10384
Reviewed-on: https://chromium-review.googlesource.com/203871
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Reviewed-by: Joe Konno <joe.konno@linux.intel.com>
Commit-Queue: Joe Konno <joe.konno@linux.intel.com>
Tested-by: Joe Konno <joe.konno@linux.intel.com>
BACKPORT: drm/i915/bdw: Extract rp_state_caps logic

We have a need for duplicated parsing of the RP_STATE_CAPS register (and
the setting of the associated fields). To reuse some code, we can
extract the function into a simple helper.

This patch also addresses the fact that we missed doing this for gen8,
something we should have done anyway.

This could be two patches, one to extract, and one to add gen8, but it's
trivial enough that I think one is fine. I will accept a request to
split it. Please notice the fix addressed by v2 below.

Valleyview is left untouched because it is different.

v2: Logically rebased on top of
commit dd0a1aa19bd3d7203e58157b84cea78bbac605ac
Author: Jeff McGee <jeff.mcgee@intel.com>
Date:   Tue Feb 4 11:32:31 2014 -0600

    drm/i915: Restore rps/rc6 on reset

Note with the above change the fix for gen8 is also handled (which was
not the case in Jeff's original patch).

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
(cherry picked from commit 3280e8b08fd0647629530c27cd36b37982a3b597)
Signed-off-by: Wayne Boyer <wayne.boyer@intel.com>

BUG=None
TEST=WebGL Aquarium with 100 fish runs at 60 fps versus ~20 fps
TEST=frequeny values in /sys/class/drm/card0 are correct
TEST=RC6 shows expected values as reported by powertop

Change-Id: I4203750f62aab6c4e09b4630b83be1e7b004ea41
Reviewed-on: https://chromium-review.googlesource.com/203872
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Reviewed-by: Joe Konno <joe.konno@linux.intel.com>
Commit-Queue: Joe Konno <joe.konno@linux.intel.com>
Tested-by: Joe Konno <joe.konno@linux.intel.com>
BACKPORT: drm/i915: Refactor gen6_set_rps

What used to be a short-circuit now needs to adjust interrupt masking in
response to user requests for changing the min/max allowed frequencies.
This is currently done by a special case and early return, but the next
patch adds another common action to take, so refactor the code to reduce
duplication.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Deepak S <deepak.s@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
(cherry picked from commit eb64cad1c13a22cd4f3b061720c71f35e44eec20)
Signed-off-by: Wayne Boyer <wayne.boyer@intel.com>

BUG=None
TEST=WebGL Aquarium with 100 fish runs at 60 fps versus ~20 fps
TEST=frequeny values in /sys/class/drm/card0 are correct
TEST=RC6 shows expected values as reported by powertop

Change-Id: Ibee6b04d4043737437adb7a5bc138a46c372e683
Reviewed-on: https://chromium-review.googlesource.com/203873
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Reviewed-by: Joe Konno <joe.konno@linux.intel.com>
Commit-Queue: Joe Konno <joe.konno@linux.intel.com>
Tested-by: Joe Konno <joe.konno@linux.intel.com>