arm: tegra: grouper: Fix panel power on/off sequence

Panel power on/off sequence should meet the panel spec as below.

power on:
1. EN_VDD_PNL
2. PCLK
3. LVDS_EN
4. LCD_BL_PWN

power off:
1. LCD_BL_PWN
2. LVDS_EN
3. PCLK
4. EN_VDD_PNL

Pixel clock on/off is controlled by dc driver, we need to separate the
setting of panel enable/disable into two parts. The first, i.e., before
pclk on/off, is done in grouper_panel_enable()/grouper_panel_prepoweroff().
And the second part, i.e., after pclk on/off, is done in
grouper_panel_postpoweron()/grouper_panel_disable().
video: tegra: host: Register devices in SoC files - add include

Move the device structures to the driver source code files. Register
all nvhost_device's in one loop which is called from board file.

host1x driver code is moved to live under host1x, too. This causes
a need to add host to include path of tegradc and nvavp.