x86: Limit number of extended LVTs on AMD

If future hardware should decide to report more than 4 LVTs, our
apic_reserved_bits array would overflow when enabling all of them in
apic_cpu_init.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Use symbolic registers for tuning apic_reserved_bits

No functional changes.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>