NetCase::synth_async gets a better handle on partly used inputs

Better handle the case where the output for some pins comes from
an earlier assignment. This allows for multiple ways to specify
default outputs for some cases: the default: case and pre-assignment.
Handle special case of missing condit inputs.

It shouldn't be possible, but sometimes is, that a NetCondit is
missing input nets during async synthesis. Handle this by generating
a place-holder net and printing a warning.
Add synthesis support for casez statements.

This generates an EQZ LPM device that carries the case-z-ness to
the code generator.

Also add to the vvp code generator support for the EQZ device so
that the synthesis results can be simulated.

Account for the wildcard devices in the sizer.
case/x/z synthesis with constant case expression.

If the case expression is constant, then the guards probably are
not, and the synthesis should be handled differently.
Merge branch 'master' into x-sizer5