Still looking into lib issue.
Now the fpga is working.
A spelling error was causing not to compile.
-  alias fwd_ins_tmp_s is tojpeg_s(52);
+  alias fwd_inv_tmp_s is tojpeg_s(52);
not using constant flags
-  even_odd_s <= '1';
-  fwd_inv_s <= '1';
+  even_odd_s <= even_odd_tmp_s;
+  fwd_inv_s <= fwd_inv_tmp_s;
std_logic_vector is going into std_logic
needed to fix jpeg-2000.py

-             res_s.next =  sam_s + (left_s +  right_s + 2)>>2
+             res_s.next =  sam_s + ((left_s +  right_s + 2)>>2)
-             res_s.next =  sam_s - (left_s +  right_s + 2)>>2
+             res_s.next =  sam_s - ((left_s +  right_s + 2)>>2)
This is what being sent to the fpga
jpeg = XsDut(USB_ID, JPEG_ID, [17, 17, 17, 1, 1], [17])
In this test the even_odd flag is true and fwd_inv is false
pc_jpeg_test.py

  406   508    15 1 0   667   667
results are the same between the local and FPGA
  202    59   355 1 0   408   408
results are the same between the local and FPGA
   75   443   274 1 0   433   433