Squashed 'llvm/' changes from 57a73c2..837a7c0

837a7c0 Since the DisasmMemoryObject only operates on const data, it now only accepts a const data pointer. This silences a -Wcast-qual warning.
733681d Add missing attributes !cmp.[eq,gt,gtu] instructions.
1d545d9 Add llvm_unreachables() for [ASZ]ExtUpper to X86FastISel.cpp to appease the buildbots.
03fe69e [mips] Add CCValAssign::[ASZ]ExtUpper and CCPromoteToUpperBitsInType and handle struct's correctly on big-endian N32/N64 return values.
6765c34 Add aliases for VAND imm to VBIC ~imm
4b667ee [x86] Teach the new vector shuffle lowering to use AVX2 instructions for v4f64 and v8f32 shuffles when they are lane-crossing. We have fully general lane-crossing permutation functions in AVX2 that make this easy.
b10671b Update my previous commit to fit 80 cols...
cabd41e Details that -debug-only is not available when LLVM is built with --enable-optimized
05901d8 [x86] Teach the new vector shuffle lowering a fancier way to lower 256-bit vectors with lane-crossing.
f220c53 [Thumb2] BXJ should be undefined for v7M, v8A
2e8d2c7 [x86] Fix an oversight in the v8i32 path of the new vector shuffle lowering where it only used the mask of the low 128-bit lane rather than the entire mask.
e5fb4ad [x86] Rearrange the code for v16i16 lowering a bit for clarity and to reduce the amount of checking we do here.
e3bb4bb [x86] Implement AVX2 support for v32i8 in the new vector shuffle lowering.
1d63231 [x86] More tweaks to the v32i8 test cases.
a87d04a [x86] Re-work a bunch of the v32i8 test cases to actually involve byte shuffles rather than word shuffles.
dd8ce12 MC: Use @IMGREL instead of @IMGREL32, which we can't parse
6a289bb [x86] Remove the defunct X86ISD::BLENDV entry -- we use vector selects for this now.
ef673b3 [x86] Fix the v16i16 blend logic I added in the prior commit and add the missing test cases for it.
aacc919 llvm-cov: Combine segments that cover the same location
0253523 [X86,AVX] Add an isel pattern for X86VBroadcast.
bdecfeb [x86] Implement v16i16 support with AVX2 in the new vector shuffle lowering.
e793862 Flush out enough of llvm-objdump’s SymbolizerSymbolLookUp() for Mach-O files to get the literal string “Hello world” printed as a comment on the instruction that loads the pointer to it. For now this is just for x86_64. So for object files with relocation entries it produces things like:
0e9d114 [asan] don't instrument module CTORs that may be run before asan.module_ctor. This fixes asan running together -coverage
d4c244f Removing empty ARM tests from failed revert
ae3027c Removing empty tests from failed revert
bb994f5 Revert 218406 - Refactor the RelocVisitor::visit method
450403a Revert 218407 - Add support for ARM and AArch64 BE object files
6c34b46 Revert 218408 - Report endianness in output of {dwarf, obj}dump
7fff39a Revert 218411 - XFAIL reloc test on x86/hexagon
ebf023f XFAIL reloc test on x86/hexagon
d3d620b Revert r218380. This was breaking Apple internal build bots.
329e09f Report endianness in output of {dwarf, obj}dump
bc7101b Add support for ARM and AArch64 BE object files
c0104e4 Refactor the RelocVisitor::visit method
f14380a pass environment when invoking llvm-config from lit.cfg
4bb780a Adding #ifdef around TermColorMutex based on feedback from Craig Topper.
c88ae96 [x86] Factor out the logic to generically decombose a vector shuffle into unblended shuffles and a blend.
9917d2e Revert "Add support for ARM and AArch64 BE object files"
48ac014 Revert "Report endianness in output of {dwarf, obj}dump"
a0d6422 Revert "Refactor the RelocVisitor::visit method"
c3a1f3e Report endianness in output of {dwarf, obj}dump
1513681 Add support for ARM and AArch64 BE object files
faac033 Refactor the RelocVisitor::visit method
cfc4296 Fix assertion in LICM doFinalization()
8c4e64a [Thumb] Make load/store optimizer less conservative.
43c6b6b [Thumb] 32-bit encodings of 'cps' are not valid for v7M
6a07014 Silencing an "enumeral and non-enumeral type in conditional expression" warning. NFC.
7a27231 Replace a hand-written suffix compare with std::lexicographical_compare.
10cd8098 [x86] Teach the instruction lowering to add comments describing constant pool data being loaded into a vector register.
35fdc09 Allow BB duplication threshold to be adjusted through JumpThreading's ctor
bfb2b18 Windows/Host.inc: Reformat the header to fit 80-col.
d968b05 Unix/Host.inc: Remove <cstdlib>. It has been unused for a long time.
4921f68 Unix/Host.inc: Wrap a comment line in 80-col.
c44f94d Unix/Host.inc: Remove leading whitespace. It had been here since r56942!
6b37197 valgrind/x86_64-pc-linux-gnu.supp: Suppress also /bin/bash.
80b7979 valgrind/x86_64-pc-linux-gnu.supp: Tweak /bin/sed to let calloc recognized.
1fe409e Clear PreferredExtendType for in each function-specific state FunctionLoweringInfo.
f00b50b [x86] More refactoring of the shuffle comment emission. The previous attempt didn't work out so well. It looks like it will be much better for introducing extra logic to find a shuffle mask if the finding logic is totally separate. This also makes it easy to sink the opcode logic completely out of the routine so we don't re-dispatch across it.
db5e1da [x86] Bypass the shuffle mask comment generation when not using verbose asm. This can be somewhat expensive and there is no reason to do it outside of tests or debugging sessions. I'm also likely to make it significantly more expensive to support more styles of shuffles.
7e0f903 [x86] Hoist the logic for extracting the relevant bits of information from the MachineInstr into the caller which is already doing a switch over the instruction.
59da3f0 R600/SI: Add new helper isSGPRClassID
2e67962 R600/SI: Fix hardcoded and wrong operand numbers.
9b50273 R600/SI: Enable named operand table for SALU instructions
5f671ba [x86] Start refactoring the comment printing logic in the MC lowering of vector shuffles.
0bb38df R600/SI: Fix weird CHECK-DAG usage
81c6c96 R600/SI: Enable selecting SALU inside branches
abe9b22 R600/SI: Move PHIs that define SGPRs to the VALU in most cases
36ba796 R600/SI: Fix the FixSGPRLiveRanges pass
90d1726 R600/SI: Mark EXEC_LO and EXEC_HI as reserved
b811241 R600/SI: Fix SIRegisterInfo::getPhysRegSubReg()
860cabe R600/SI: Implement VGPR register spilling for compute at -O0 v3
6717f9d [x86] Teach the new vector shuffle lowering to lower v8i32 shuffles with the native AVX2 instructions.
8415f84 [x86] Fix a really terrible bug in the repeated 128-bin-lane shuffle detection. It was incorrectly handling undef lanes by actually treating an undef lane in the first 128-bit lane as a *numeric* shuffle value.
73ce288 Fix swift-atomics testcase
30ce74b [x86] Teach the new vector shuffle lowering to lower v4i64 vector shuffles using the AVX2 instructions. This is the first step of cutting in real AVX2 support.
8577eaf GlobalOpt: Preserve comdats of unoptimized initializers
bd84764 AArch64: allow constant expressions for shifted reg literals
798f284 [x86] Teach the rest of the 'target shuffle' machinery about blends and add VPBLENDD to the InstPrinter's comment generation so we get nice comments everywhere.
33aca6d R600/SI: Clean up checks for legality of immediate operands
30e7514 [X86] Make wide loads be managed by AtomicExpand
58bca6e [Power] Use AtomicExpandPass for fence insertion, and use lwsync where appropriate
fd4c3c9 Add AtomicExpandPass::bracketInstWithFences, and use it whenever getInsertFencesForAtomic would trigger in SelectionDAGBuilder
2bb5b29 [MCJIT] Fix some more RuntimeDyld debugging output format specifiers.
4fcebee [MCJIT] Remove PPCRelocations.h - it's no longer used.
8439e5e Just add a fixme about a possibly faster implementation of some atomic loads on some ARM processors
226537a Fix typo
7024c7e [x86] Teach the new shuffle lowering's blend functionality to use AVX2's VPBLENDD where appropriate even on 128-bit vectors.
3025b00 [MCJIT] Nuke MachineRelocation and MachineCodeEmitter. Now that the old JIT is gone they're no longer needed.
04b11eb [docs] Fixed a typo in Atomics.rst
e0c253f [MCJIT] Remove a few more references to JITMemoryManager that survived r218316.
f718bf7 [MCJIT] Remove #include of JITMemoryManager that accidentally survived r218316.
0717be9 [MCJIT] Delete the JTIMemoryManager and associated APIs.
ff5cfb4 Use SDValue bool operator to reduce code. No functional change.
abe1cb7 Fix segfault in AArch64 backend with -g and -mbig-endian
a6c580e Rework r218304, "ExecutionEngineTests: Call llvm_shutdown() on exit for ManagedStatic introduced in r218151."
7cde53f valgrind/x86_64-pc-linux-gnu.supp: We don't care if sed leaks.
cda6e24 Fix a small typo in the test comment
431d7c7 Loop instead of individual def's for each GPR.
0c5fa47 ExecutionEngineTests: Call llvm_shutdown() on exit for ManagedStatic introduced in r218151.
afb2f16 Rebuild the inputs for the codeview-linetables.test with VS2013 Also provide reproducible instructions
fd42335 Do not destroy external linkage when deleting function body
4850be4 [x86] Teach the vector comment parsing and printing to correctly handle undef in the shuffle mask. This shows up when we're printing comments during lowering and we still have an IR-level constant hanging around that models undef.
8f63778 [x86] Teach the AVX1 path of the new vector shuffle lowering one more trick that I missed.
5f84303 Ensure bitcode encoding stays stable. This includes constants, attributes, and some additional instructions not covered by previous tests.
72bffaa [ADT/IntrusiveRefCntPtr] Give friend access to IntrusiveRefCntPtr<X> so the relevant move constructor can access 'Obj'.
66e6cd2 Windows/DynamicLibrary.inc: Remove 'extern "C"' in ELM_Callback.
c4ef4e4 tighten up checks
f1a19cd Converting terminalHasColors mutex to a global ManagedStatic to avoid the static destructor.
4b36515 [x86] Rename X86ISD::VPERMILP to X86ISD::VPERMILPI (and the same for the td pattern). Currently we only model the immediate operand variation of VPERMILPS and VPERMILPD, we should make that clear in the pseudos used. Will be adding support for the variable mask variant in my next commit.
cdc451b Fix a "typo" from my previous commit.
1488ba6 Silence unused variable warnings in the new stub functions that occur when assertions are disabled.
90969b9 remove unnecessary labels; NFC
8571ae3 [x86] Stub out the integer lowering of 256-bit vectors with AVX2 support. No interesting functionality yet, but this will let me implement one vector type at a time.
612d00a In this callback ModuleName includes the file path. Comparing ModuleName to the file names listed will always fail.
af98965 [FastISel][AArch64] Also allow folding of sign-/zero-extend and shift-left for booleans (i1).
e6f6980 ms-inline-asm: Fix parsing label names inside bracket expressions
d80fc69 MC: ReadOnlyWithRel section kinds should map to rdata in COFF
56c7cfe [x86] Introduce tests covering the gamut of 256-bit vector shuffling.
a956b28 Make MCAsmParserSemaCallback::LookupInlineAsmLabel a pure virtual function
6539887 Use broadcasts to optimize overall size when loading constant splat vectors (x86-64 with AVX or AVX2).
73c604b Fix test case commited in r218242 to appease buildbot.
e1bc40b Revert "R600/SI: Add support for global atomic add"
22d4487 Fix a test introduced in r218246 to work also on Windows.
6d625ad R600/SI: Add support for global atomic add
2de7c38 R600/SI: Remove modifier operands from V_CNDMASK_B32_e64
a05b677 R600: Don't set BypassSlowDiv for 64-bit division
e2badaf R600/SI: Use ISD::MUL instead of ISD::UMULO when lowering division
2c4a45f R600/SI: Add enums for some hard-coded values
25c57d5 [x32] Fix segmented stacks support
21e5bf8 [dwarfdump] Dump full filenames as DW_AT_(decl|call)_file attribute values
cc55b73 Allow DWARFDebugInfoEntryMinimal::getSubroutineName to resolve cross-unit references.
2ee97f0 Fix assert when decoding PSHUFB mask
98ef347 Downgrade DWARF2 section limit error to a warning
1e165a0 Update comment on AtomicRMWInst::Nand
ec35919 [x86] Move the AVX v4i64 test cases down to group them together.
de3646b Add two thresholds lvi-overdefined-BB-threshold and lvi-overdefined-threshold for LVI algorithm. For a specific value to be lowered, when the number of basic blocks being checked for overdefined lattice value is larger than lvi-overdefined-BB-threshold, or the times of encountering overdefined value for a single basic block is larger than lvi-overdefined-threshold, the LVI algorithm will stop further lowering the lattice value.
ffaafbe ms-inline-asm: Add a sema callback for looking up label names
de95c38 [x86] Back out a bad choice about lowering v4i64 and pave the way for a more sane approach to AVX2 support.
37bb4b0 [x86] Teach the new vector shuffle lowering how to cleverly lower single input v8f32 shuffles which are not 128-bit lane crossing but have different shuffle patterns in the low and high lanes. This removes most of the extract/insert traffic that was unnecessary and is particularly good at lowering cases where only one of the two lanes is shuffled at all.
7da57cf [x86] Add a bunch of test cases where we have different shuffle patterns in the high and low 128-bit lanes of a v8f32 vector.
b16c657 Fix typo
19ebadd Use llvm_unreachable instead of assert(!)
c65f7bc R600/SI: Don't use strings for single characters
52eebba Remove redundant if test.
3e05b40 Refactor reciprocal square root estimate into target-independent function; NFC.
42dac65 mop up: "Don’t duplicate function or class name at the beginning of the comment."
974e872 [x86] With the stronger canonicalization of shuffles added in r218216, the new vector shuffle lowering no longer needs to check both symmetric forms of UNPCK patterns for v4f64.
974542d [x86] Teach the new vector shuffle lowering to re-use the SHUFPS lowering when it can use a symmetric SHUFPS across both 128-bit lanes.
38e1816 [x86] Refactor the logic to form SHUFPS instruction patterns to lower a generic vector shuffle mask into a helper that isn't specific to the other things that influence which choice is made or the specific types used with the instruction.
1a5f7f5 [x86] Teach the new vector shuffle lowering the basics about insertion of a single element into a zero vector for v4f64 and v4i64 in AVX. Ironically, there is less to see here because xor+blend is so crazy fast that we can't really beat that to zero the high 128-bit lane.
6ef31b0 [x86] Teach the new vector shuffle lowering how to lower to UNPCKLPS and UNPCKHPS with AVX vectors by recognizing those patterns when they are repeated for both 128-bit lanes.
7a94357 [x86] Add test cases for UNPCK instructions with v8f32 AVX vectors in preparation for enhancing their support in the new vector shuffle lowering.
7922d3e [x86] Begin teaching the new vector shuffle lowering among the most important bits of cleverness: to detect and lower repeated shuffle patterns between the two 128-bit lanes with a single instruction.
e4cb9d5 [x86] Regenerate this test case now that I've improved my script for generating the test cases to format things more consistently and actually catch all the operand sequences that should be elided in favor of the asm comments. No actual changes here.
fdaf59e [x86] Explicitly lower to a blend early if it is trivial to do so for v8f32 shuffles in the new vector shuffle lowering code.
29720a4 [x86] Teach the new vector shuffle lowering of v4f64 to prefer a direct VBLENDPD over using VSHUFPD. While the 256-bit variant of VBLENDPD slows down to the same speed as VSHUFPD on Sandy Bridge CPUs, it has twice the reciprocal throughput on Ivy Bridge CPUs much like it does everywhere for 128-bits. There isn't a downside, so just eagerly use this instruction when it suffices.
0dd5209 [x86] Add some more comprehensive tests for v4f64 blending.
57191b0 [x86] Re-generate a bunch of the v4f64 test cases with my new script.
2508955 [x86] Switch the blend implementation to use a MVT switch rather than awkward conditions. The readability improvement of this will be even more important as I generalize it to handle more types.
4127d76 [x86] Remove some essentially lying comments from the v4f64 path of the new vector shuffle lowering.
05a8a72 [x86] Fix a helper to reflect that what we actually care about is 128-bit lane crossings, not 'half' crossings. This came up in code review ages ago, but I hadn't really addresesd it. Also added some documentation for the helper.
291140b [x86] Teach the new vector shuffle lowering the first step toward more actual support for complex AVX shuffling tricks. We can do independent blends of the low and high 128-bit lanes of an avx vector, so shuffle the inputs into place and then do the blend at 256 bits. This will in many cases remove one blend instruction.
31b080d MC: Support aligned COMMON symbols for COFF
1ca1e33 [x86] Add some more test cases covering specific blend patterns.
b7ef7f9 [x86] Add the beginnings of some tests for our v8f32 shuffle lowering under AVX.
0d61e37 RTDyldMemoryManager::getSymbolAddress(): Make sure to return 0 if symbol name is not met. [-Wreturn-type]
843e6bf mop up: "Don’t duplicate function or class name at the beginning of the comment."
ae464b2 [x86] Teach the new vector shuffle lowering to use VPERMILPD for single-input shuffles with doubles. This allows them to fold memory operands into the shuffle, etc. This is just the analog to the v4f32 case in my prior commit.
479d0ba [x86] Add an AVX run to the 128-bit v2 tests, teach them to have a generic SSE and AVX mode in addition to a specific AVX1 test path, and flesh out the AVX tests.
182c8ff Update tests which broke from r218189
9c7ffd2 [x86] Teach the new vector shuffle lowering to use the AVX VPERMILPS instruction for single-vector floating point shuffles. This in turn allows the shuffles to fold a load into the instruction which is one of the common regressions hit with the new shuffle lowering.
1c1bde6 MC: Fix MCSectionCOFF::PrintSwitchToSection
cc727ec [x86] Start moving to a fancier check syntax to reduce the need for duplication of check lines. The idea is to have broad sets of compilation modes that will frequently diverge without having to always and immediately explode to the precise ISA feature set.
2fd2535 [MCJIT] Make RTDyldMemoryManager::getSymbolAddress's behaviour more consistent.
7df63b7 llvm-cov: Allow creating CoverageMappings from filenames
9eb3816 llvm-cov: Disentangle the coverage data logic from the display (NFC)
73edcff llvm-cov: Move some reader debug output out of the tool.
31235e5 Using a deque to manage the stack of nodes is faster here.
3f34ae9 MC: Treat ReadOnlyWithRel and ReadOnlyWithRelLocal as ReadOnly for COFF
c16105b [x86] Teach the v4f32 path of the new shuffle lowering to handle the tricky case of single-element insertion into the zero lane of a zero vector.
9ba9f1a [x86] Refactor the code for emitting INSERTPS to reuse the zeroable mask analysis used elsewhere. This removes the last duplicate of this logic. Also simplify the code here quite a bit. No functionality changed.
cc62abb [x86] Generalize the single-element insertion lowering to work with floating point types and use it for both v2f64 and v2i64 single-element insertion lowering.
8924ed3 [x86] Replace some duplicated logic reasoning about whether particular vector lanes can be modeled as zero with a call to the new function that computes a bit-vector representing that information.
c7210b3 llvm-readobj: pretty-print special COFF section names
87f7e75 Fix crash with an insertvalue that produces an empty object.
613c7d0 [X86] Erase some obsolete comments from README.txt
b534956 constify the TargetMachine being passed through the Mips subtarget creation.
784954d Converting InstrProf's error_category to a ManagedStatic to avoid static constructors and destructors.
3f71e22 DIBuilder: Delete dead code, NFC
1a505eb R600: Un-xfail a test which passes with pass disabled
ea3a024 R600/SI: Un-xfail tests which work now
3b5a0bf Converting SpillPlacement's BlockFrequency threshold to a ManagedStatic to avoid static constructors and destructors.
c58ab80 R600/SI: Un xfail a test that works now
faf93a6 [FastIsel][AArch64] Fix a think-o in address computation.
1595b12 Converting object's error_category to a ManagedStatic to avoid static constructors and destructors.
f7ca355 [x86] Hoist a function up to the rest of the non-type-specific lowering helpers, and re-flow the logic to use early exit and be a bit more readable.
73f6823 Converting the JITDebugLock mutex to a ManagedStatic to avoid the static constructor and destructor.
401b720 [x86] Hoist the actual lowering logic into a helper function to separate it from the shuffle pattern matching logic.
7d1a53b Converting FuncNames to a ManagedStatic to avoid static constructors and destructors.
ea28172 R600/SI: Fix config value for number of gprs
4ea1a11 Eliminating static destructor for the BitCodeErrorCategory by converting to a ManagedStatic.
dc58d1e [x86] Fully generalize the zext lowering in the new vector shuffle lowering to support both anyext and zext and to custom lower for many different microarchitectures.
55dd199 Add hsail and amdil64 to Triple
297149b llvm-cov: Return unique_ptrs instead of filling objects (NFC)
dcd8562 llvm-cov: Prevent a test from matching its own check lines
0914f63 Revert my earlier change to add "all" as a dependency to check. In retrospect it really wasn't a good idea.
b2c0a6d Fix test case to be portable to different architectures.
c14f763 R600/SI: Fix test to prepare for scheduler
9e4e3d0 Omit DW_TAG_subprograms for subprograms without inlined subroutines when producing -gmlt data
f5938ee Change DwarfCompileUnit::createGlobalVariable to getOrCreateGlobalVariable.
b9f4e7d Turn local DWARFContext helpers getFileNameForUnit() and getFileLineInfoForCompileUnit() into full-blowm DWARFDebugLine::LineTable methods.
b845a6f Elide unnecessary DenseMap copy.
c404e82 Optionally enable more-aggressive FMA formation in DAGCombine
89436b4 [x86] Recognize that we can use duplication to widen v16i8 shuffles due to undef lanes as well as defined widenable lanes. This dramatically improves the lowering we use for undef-shuffles in a zext-ish pattern for SSE2.
3e990c1 [x86] Actually test the SSE2 lowering for most of the zext-ish shuffles.
ec1f7b1 [x86] Teach the new vector shuffle lowering to also use pmovzx for v4i32 shuffles that are zext-ing.
42b9688 llvm-cov: Fix dropped lines when filters were applied
ddbcfa0 llvm-cov: Generalize -filename-equivalence
330aa6f [x86] Add a dedicated lowering path for zext-compatible vector shuffles to the new vector shuffle lowering code.
61519cd Optimize sext/zext insertion algorithm in back-end.
a562871 Omit DW_AT_frame_base under -gmlt for size
3713288 Describe the -gmlt optimization committed in the previous revision.
a5a4f87 Omit all the extra static attributes on subprograms in -gmlt
2ee31bc Fix an it's vs. its typo.
bd2b96a R600: Better fix for bug 20982
9b676fd [x86] Extend this test to cover SSE4.1. Nothing interesting here, but paves the way for subsequent changes.
fb2832f Try to fix i686-cygming bots.
76f0a92 Use cast<> instead of unchecked dyn_cast<>
b7fe581 Fix sphinx warning.
394be6c LTO: introduce object file-based on-disk module format.
65edced [ARM] Do not perform a tail call when the caller returns several values. The fix is slightly different then x86 (see r216117) because the number of values attached to a return can vary even for a single returned value (e.g., f64 yields two returned values).
e3d674f llvm-cov: Simplify FunctionInstantiationSetCollector (NFC)
5052940 Restore "[ARM, Fix] Fix emitLeading/TrailingFence on old ARM processors"
c21e4e1 Reverting NFC changes from r218050. Instead, the warning was disabled for GCC in r218059, so these changes are no longer required.
d80c086 [MCJIT] Fix a debugging-output formatting bug in RuntimeDyld.
7458ce3 Revert part of r218041.
335a2eb Disable GCC's -Woverloaded-virtual in the configure+make build. Clang's is better.
e08e525 R600: Bug 20982 - Avoid undefined left shift of negative value
262d57d [SKX] Deriving rmb multiclasses from general one (avx512_icmp_packed_rmb and avx512_icmp_cc_rmb). Thanks Adam Nemet for notice about this.
cf5bea8 Fixing a bunch of -Woverloaded-virtual warnings due to hiding getSubtargetImpl from the base class. NFC.
6c0e053 Alternative (to r216344) fix of gcc -Wpedantic.
0a8f3af Always emit DW_AT_declaration attribute when the variable isn't a definition.
344b668 Fix DWARFUnitSection::getUnitForOffset().
72f0d95 [x86] Use PALIGNR for v4i32 and v2i64 blends when appropriate.
088aa09 [x86] Add an SSSE3 run and check mode to the 128-bit v2 tests of the new vector shuffle lowering. This will be needed for up-coming palignr tests.
b2f2aa9 [mips] Remove custom versions of CCState::AnalyzeReturn() and CCState::AnalyzeCallReturn().
f789dac Revert "[FastISel][AArch64] Fold bit test and branch into TBZ and TBNZ."
ef48b51 Fix previous commit: [FastISel][AArch64] Simplify XALU multiplies.
e7fba00 [FastISel][AArch64] Simplify XALU multiplies.
4b6f00a [FastISel][AArch64] Followup commit for 218031 to handle negative offsets too.
22b557d [FastISel][AArch64] Try to fold the offset into the add instruction when simplifying a memory address.
ffbd487 [FastISel][AArch64] Fold 'AND' instruction during the address computation.
49ab1a4 [x86] Add an SSSE3 run to the v4 shuffle test.
9c00ddb ARM: prevent crash on ELF directives on COFF
3ff7684 [x86] Initial step of teaching the new vector shuffle lowering about PALIGNR. This just adds it to the v8i16 and v16i8 lowering steps where it is completely unmatched. It also introduces the logic for detecting rotation shuffle masks even in the presence of single input or blend masks and arbitrarily undef lanes.
5bf6559 ARM: use a more precise check for MachO
710fc31 [FastISel][AArch64] Fold bit test and branch into TBZ and TBNZ.
12a9dbd Add file to CMake build as well.
757c90d Add a new pass FunctionTargetTransformInfo. This pass serves as a shim between the TargetTransformInfo immutable pass and the Subtarget via the TargetMachine and Function. Migrate a single call from BasicTargetTransformInfo as an example and provide shims where TargetMachine begins taking a Function to determine the subtarget.
6693d0d Fix FastISel bug in boolean returns for PowerPC.
0c3b56b Remove unnecessary blank space (test commit)
52675f3 Reapply fix in r217988 (reverted in r217989) and remove the alternative fix committed in r217987.
f8b9ec9 Revert "Fix -Wnon-virtual-dtor warning introduced in r217982."
be048a0 Fix -Wnon-virtual-dtor warning introduced in r217982.
0a1dc0d Fixing the sanitizer build failure:
7516444 [FastISel][AArch64] Custom lower sdiv by power-of-2.
69e88e8 [llvm-objdump] clean up test cases now that build bots are green
5fbcc30 llvm-cov: Push some more debug output into the View (NFC)
6ba12f9 Fixing a build error.
14f9a54 Refactoring SimplifyLibCalls to remove static initializers and generally cleaning up the code.
2bfef92 Internalize common symbols when we can.
580875d [FastISel][AArch64] Simplify mul to shift when possible.
dc4eb3d Exclude known and bugzilled failures from UBSan bootstrap
46d6fd2 [FastISel][AArch64] Fold mul into add/sub and logical operations.
5461af9 [FastISel][AArch64] Fold mul into the address computation of memory operations.
b3edb56 llvm-cov: Rework the API for getting the coverage of a file (NFC)
e5d8abe Fixup for r217830. Don't do left shifts on negative values
e2ff4e4 Revert "[ARM, Fix] Fix emitLeading/TrailingFence on old ARM processors"
07c9ae5 [FastISel][AArch64] Fold compare with zero and branch into CBZ and CBNZ.
5607f8d Another required re-setting for MCStreamer::reset().
4ad9b91 R600/SI: Remove assert
3143460 R600/SI: Rough first implementation of shouldClusterLoads
8df2cae Fix float division-by-zero in R600 scheduler.
17e0ee5 [FastISel][AArch64] Improve branch selection to support all FP conditions.
30486fa [ARM, Fix] Fix emitLeading/TrailingFence on old ARM processors
5076362 R600/SI: Change formatting of printed FP immediates
c6b1a7e [IndVarSimplify] Partially revert r217953 to see if this fixes the bots.
0a277ea LineIterator: Provide a variant that keeps blank lines
27608d8 R600/SI: Remove promotion of instructions to e64 forms.
c5f6b53 [IndVarSimplify] Widen loop compare instructions.
a34cab9 [InstCombine] Fix wrong folding of constant comparison involving ahsr and negative quantities (PR20945).
2ca5f03 Add DIBuilder functions to build RAUWable DIVariables and DIFunctions.
c63035a Add and update reset() and doInitialization() methods to MC* and passes. This enables reusing a PassManager instead of re-constructing it every time.
4378ff0 [mips] Add assembler support for the .set nodsp directive.
217ab20 llvm-cov: Fix a typo
780f7e2 [x32] Fix function indirect calls
cc0c4e7 Add move constructors/assignment to make MSVC happy after r217940
d1b4e60 llvm-cov: Distinguish expansion/instantiation from SourceCoverageView
d5f7353 InstSimplify: Don't allow (x srem y) urem y -> x srem y
27e656c InstSimplify: ((X % Y) % Y) -> (X % Y)
22d885d [Object] keep trailing '\0' out of StringRef when parsing mach-o bindings
11903b5 | -> || No functional change.
290c772 Fix identify_magic() with mach-o stub dylibs.
2b90611 [llvm-objdump] properly use c_str() with format("%s").  Improve getLibraryShortNameByIndex() error handling.
5c16c4e [X86] Use the generic AtomicExpandPass instead of X86AtomicExpandPass
9fe79b4 [CodeGenPrepare][AddressingModeMatcher] The promotion mechanism was expecting instructions when truncate, sext, or zext were created. Fix that.
ce90652 [llvm-objdump] improve error reporting of bad mach-o ordinals
ca7da16 This add a reset method for WinCOFFObjectWriter, like other MC* classes.
a0b4148 tweak test case for debugging bot
374e06b Add back a fallback case for targets that do not or cannot implement getNoopForMachoTarget().
fdedee2 Hookup the MCSymbolizer to llvm-objdump’s disassembly for Mach-O files.
3959d43 Fix typo
15b49e1 Add a missing return to operator=
61e184d Fix move-only type issues in Interpreter with MSVC
763d8b2 [TableGen] Fully resolve class-instance values before defs in multiclasses
7cb345e [X86] Improve comment
9753aab ARM load/store optimizer: Don't materialize a new base register with ADDS/SUBS unless it's safe to clobber the condition flags.
8be86aa Spell out a move ctor. Even the 2013 vintage of MSVC cannot synthesize move ctors.
a9478c4 Interpreter: Hack around a series of bugs in MSVC 2012 that copies around this move-only struct.
cdb6326 [mips] Improve the error messages given by MipsAsmParser.
baaa29f Make DWARFUnitSection final and change base class to non-virtual protected destructor.
e40de57 [mips] Move 32-bit ADDiu instruction alias from Mips64InstrInfo.td to MipsInstrInfo.td.
c6380f0 [mips] Marked the ADDi instruction aliases as not available in Mips32R6 and Mips64R6.
e9233b3 ARMAsmBackend uses a factory method to generate binary file format specific objects.  There were a few FIXMEs in ARMAsmBackend.cpp suggesting the class definitions should be in a separate file.  Starting with ARMAsmBackend, the class definition has been put in a header file, and #includes reduced.  Each sub-type of ARMAsmBackend is now in its own header file.
359ae29 [InstCombine] Remove redundant test case.
0218e1e AVX-512: added cost for some AVX-512 instructions
d41bba1 llvm-cov: Rename a variable and clean up its usage
91737e1 tweak test case to help build bot
8def8d9 Fix BasicTTI::getCmpSelInstrCost to deal with illegal vector types
50c1eff yaml2obj: Support bigobj
23ed1ea tweak test case to help solve why failing on one build bot
07b445a [x86] Remove a FIXME that doesn't make any sense. Only the lanes feeding the blend that is matched by this are "used" in any sense, and so any build_vector or other nodes feeding these will already drop other lanes.
2f21b7e [x86] Cleanup an unused variable by actually using it in the non-asserts place where it was needed.
367cf70 [llvm-objdump] for mach-o add -bind, -lazy-bind, and -weak-bind options
2e363ec [x86] Remove the last vestiges of the BLENDI-based ADDSUB pattern matching. This design just fundamentally didn't work because ADDSUB is available prior to any legal lowerings of BLENDI nodes. Instead, we have a dedicated ADDSUB synthetic ISD node which is pattern matched trivially into the instructions. These nodes are then recognized by both the existing and a trivial new lowering combine in the backend. Removing these patterns required adding 2 missing shuffle masks to the DAG combine, without which tests would have failed. Added the masks and a helpful assert as well to catch if anything ever goes wrong here.
c9bc145 [FastISel][AArch64] Add vector support to argument lowering.
bad2c13 [x86] As a follow-up to r217819, don't check for VSELECT legality now that we don't use VSELECT and directly emit an addsub synthetic node. Also remove a stale comment referencing VSELECT.
cba9d12 [x86] Add the beginnings of a proper DAG combine to match ADDSUBPS and ADDSUBPD nodes out of blends of adds and subs.
c0f00e9 [FastISel][AArch64] Add missing test case for previous commit.
488f228 [FastISel][AArch64] Allow handling of vectors during return lowering for little endian machines.
d8629f3 [FastISel][AArch64] Update function and variable names to follow the coding standard. NFC.
1bdc6c4 DebugInfo: Add comment describing the need to disable address pool usage in skeleton units.
61c9638 [FastISel][AArch64] Make AArch64FastISel class final. NFC.
df445d7 [FastISel][AArch64] Lower sin/cos/pow to runtime lib calls.
16bd30f llvm-cov: Make debug output more consistent
ccaf6dd Fix indenting caused by clang-format+spuriously indented access specifier in r216925
47a7548 llvm-cov: Fix an issue with showing regions but not counts
d41a46e Add back tests for empty function in SPARC and PowerPC.
323445f [FastISel][AArch64] Add lowering support for frem.
7d8b5f7 [FastISel] Fix a bug in FastISel::CallLoweringInfo.
ec6117c Replace repeated null checks with an assert. NFC.
9885a59 [Support] add decodeSLEB128()
05cd148 [FastISel][AArch64] Refactor selectAddSub, selectLogicalOp, and SelectShift. NFC.
4e10936 [FastISel][AArch64] Refactor code to use isTypeSupported. NFC.
5e49dcf Remove dead code in SimplifyCFG
86bdc1e [FastISel][AArch64] Improve floating-point compare support.
1ee1e8b [FastISel] Move optimizeCmpPredicate to FastISel base class. NFC.
34ad085 Add mips32 r1 to the list of supported targets for Mips fast-isel
52d7b9c Fix the build for MSVC, it doesn't support extended sizeof
fa6cf7e [x86] Start fixing our emission of ADDSUBPS and ADDSUBPD instructions by introducing a synthetic X86 ISD node representing this generic operation.
6c7ec4a Replace dead links to "Hacker's Delight" with general references. NFC.
f1198da MC: Add support for BigObj
46738fc Add return that was lost somehow in my last commit.
9d38b2f Remove ancient hack that was emulating move semantics with reference counting.
85deed0 llvm/test/CodeGen/X86/peephole-fold-movsd.ll: Relax an expression for win32.
d58cb55 Add a triple to fix the bots.
ec182fe Fix memory leak in error paths in YAMLTraits by using unique_ptr
3f0ce4f Fix a lot of confusion around inserting nops on empty functions.
49e423c [CodeGenPrepare][AddressingModeMatcher] Fix a think-o for the sext(zext) -> zext promotion introduced in r217629. We were returning the old sext instead of the new zext as the promoted instruction!
348e9e7 [X86] Fix a bug in X86's peephole optimization.
a1e80a1 CHECK-LABELize test
7447426 Use dyn_cast<> instead of isa<> and cast<>
b01c85b [MCJIT] Start Stringref-izing the ExecutionEngine interface.
f1b1604 R600/SI: Prefer selecting more e64 instruction forms.
6fc71a0 R600/SI: Make sure double vector fmul is tested
399ee93 Add unit test for r217454
e626ee5 R600/SI: Add some mubuf testcases.
187089d Spell out the template args for compilers having issues with the injected class name.

git-subtree-dir: llvm
git-subtree-split: 837a7c094b56019c6103dd37297077a28e5350c9
Merge commit '20f706933094ac55412d9f8793a172fc8ff4ad5d' into devel
Squashed 'llvm/tools/clang/' changes from 663b4dd..702863c

702863c Add increment/decrement operators and compound assignment operators to the uninitialized checkers that did not have them before.
7a0ca92 Fix handling of preincrement on bit-fields. This gives a bit-field in C++, but we were failing to find that bit-field when performing integer promotions. This brings us closer to following the standard, and closer to GCC.
bf97d36 Thread Safety Analysis:  Update to documentation.
81474bd pass environment when invoking llvm-config and clang from lit.cfg
eb4317a Simplify tests.
9c4a0f7 Downgrade error about stdcall decls with no prototype to a warning
f4daa217 clang-format: Don't let -style=Chromium imply c++03 template formatting.
4ddefda Include debug info for types referenced only via explicit cast expressions.
e453a36 Constify a functor's function call operator because it can/should be.
85e0409 Patch to allow mangling of microsoft’s __uuidof expression for the Itanium ABI when under -fms-extensions. Reviewed by John McCall. //rdar://17784718
25d34b6 Clean up ClangTool's argument adjuster handling a bit with unique_ptr.
dc251c9 Sema: Inherit the flexible array property from struct fields
b58e621 [x86] Fixed argument types in intrinsics: _addcarryx_u64 _addcarry_u64 _subborrow_u64
4c667d6 Fix the argument index error of __builtin___memccpy_chk
c056275 Fix an edge case with BinaryOperator's in -Wuninitialized.  Add testcases for the other visitors as well.
c6bdce8 Follow-up to r218292: Add more REVERTIBLE_TYPE_TRAITs.
d1307f5 MS ABI: Pure virtual functions don't contribute to vtordisps
86dc7fe Improve -Wuninitialized to take into account field ordering with initializer lists.  Since the fields are inititalized one at a time, using a field with lower index to initialize a higher indexed field should not be warned on.
f7a830a PR18793: If we try to EnterTokenStream when our current lexer is a caching lexer, add the token buffer underneath the caching lexer where possible and push the tokens directly into the caching lexer otherwise. We previously put the lexer into a corrupted state where we could not guarantee to provide the tokens in the right order and would sometimes assert.
805726b Don't perform ADL when looking up operator=; there is no non-member form of that function, and apart from being slow, this is unnecessary: ADL can trigger instantiations that are not permitted here. The standard isn't *completely* clear here, but this seems like the intent, and in any case this approach is permitted by [temp.inst]p7.
f867c44 Revert "Don't use comdats for initializers on platforms that don't support it"
03bf4c1 [OPENMP] Parsing/Sema of directive omp parallel for simd
d9e14d2 [mips] Fix r218248's testcase to use -O1 instead of -O3.
ef0ecd4 Reverting r214064 and r215650 while investigating a pesky performance regression
ac1063a Fix a typo in comment in ASTBitCodes.h
11f5513 AST: Mangle cast expression encoding more accurately
4df298b Revert r197496, as it broke REVERTIBLE_TYPE_TRAITs from PCH files.
f991770 Attempt to fix Sema/builtin-object-size.c after r218258
1a209b6 Don't use comdats for initializers on platforms that don't support it
938cd3a Fix a vftable mangling bug
8364d0e ms-inline-asm: Add a test case for the usage of labels in bracket expressions
d208e87 MS ABI: Remove a FIXME that has been fixed
29f20ee Return true from UnifySection when emitting a diagnostic
4dc3a30 Fix test/CodeGen/mips-varargs.c to use %clang_cc1
b6d4ef4 Fix evatuated value of __builtin_object_size according to its 'type'  argument when it cannot be determined which objects ptr points to at compile time. rdar://18334276
3a96d73 clang/test/CodeGen/mips-varargs.c: Fixup for -Asserts.
f7c6647 [mips] Correct alignment of vectors passed in varargs for the O32 ABI.
f066d2a removed unicode symbols from comments.
dbf602a [OPENMP] Codegen for 'omp critical' directive. This patch adds codegen for constructs: #pragma omp critical [name] <body>
5acd970 Add some documentation stating that the memory allocated by the ASTContext.h placement new does not need to be explicitly freed
d88b0e1 ms-inline-asm: Scope inline asm labels to functions
4d43b42 Fix bugs in cpuid.h.
5305cff Follow-up to r214408: Warn on other callee-cleanup functions without prototype too.
b96c3ee Fix ctor/dtor aliases losing 'dllexport' (for Itanium ABI)
9b46288 In the Itanium ABI, move stuff to the comdat of variables with static init.
ab20f2a Silence MSVC warnings from r218127 about not returning a value
c845397 Make DynTypedNode have the dynamic type of the object, instead of its static type.
238e25e Silence a signed/unsigned mismatch warning from MSVC; NFC.
38fe1ee4 clang-format: [JS] add space before operator 'in'.
7c96e01 [x86] Add _addcarry_u{32|64} and _subborrow_u{32|64}. They are added to adxintrin.h but outside __ADX__ block. These intrinics generates adc and sbb correspondingly that were available before ADX
e780202 [x86] Added _addcarryx_u32, _addcarryx_u64 intrinsics
4a280f6 [x86] Enable broadwell target in clang. Added -madx option
2cc82f4 clang-format: Prevent column layout if elements aren't uniform enough.
bd7dfd3 [OPENMP] Initial parsing/sema analysis of 'target' directive.
9aba614 clang-format: Undo r216377.
10d9bec Don't use the third field of llvm.global_ctors for MachO.
fdaff0d Revert "Put more stuff in the comdat used for variables with static init."
8a8794f Put more stuff in the comdat used for variables with static init.
9308d10 Thread Safety Analysis: add new warning flag, -Wthread-safety-reference, which warns when a guarded variable is passed by reference as a function argument. This is released as a separate warning flag, because it could potentially break existing code that uses thread safety analysis.
0e22ee0 MS ABI: Don't ICE for pointers to pointers to members of incomplete classes
7877b51 [X86, inlineasm] Do not allow using constraint 'x' for a variable larger than 128-bit unless the target CPU supports AVX.
dba2234 [X86, inline-asm] Allow 256-bit wide operands for the 'x' constraints
cd588f0 [X86, inlineasm] Check that the output size is correct for the given constraint.
03b1824 Patch to check at compile time for overflow when __builtin___memcpy_chk and similar builtins are being used. Patch by Jacques Fortier (with added clang tests).  rdar://11076881
5032e40 Revert r217995 and follow-ups:
b71291c Use exceptions() instead of getNumExceptions()/getExceptionType() to avoid accesses to incorrect exception types when getExceptionSpecType() != EST_Dynamic
f038848 Parsing/Sema of directive omp for simd
df5322b Work around MSVC parser bug by putting redundant braces around the body of this range-based for loop.
ebf6458 Basic: use hex string for __ARM_FP macro
3bdb38b Change -Wbind-to-temporary-copy from an ExtWarn to an Extension.
89b53e0 Sema: Diagnose undefined structs used as Microsoft anonymous structs
d6cc5ac Fix test case.
aaf4d17 Skip parens when detecting whether we're instantiating a function declaration.
597d2bc Fix test case.
fc3b7aa Instantiate exception specifications when instantiating function types (other than the type of a function declaration). We previously didn't instantiate these at all! This also covers the pathological case where the only mention of a parameter pack is within the exception specification; this gives us a second way (other than alias templates) to reach the horrible state where a type contains an unexpanded pack, but its canonical type does not.
381a99e [X86, inline-asm] Check that the input size is correct for constraints R, q, Q, S, D, A, y, x, f, t, and u.
3323dc0 Basic: add support for ARM ACLE 6.5.1
f2db4a0 Basic: use range-based for loops for ARM target
bb26abd Basic: whitespace fixup for ARM target info
d575b2f Don't try to devirtualize non-virtual calls
969bdb5 Don't try to use C5/D5 comdats in COFF.
d2ad170 Fix forwarding -l to MSVC's link.exe
ac14308 clang-format: Allow unbroken ::: in inline assembly.
bd4e666 clang-format: Restructure and add missing tests.
f0bac94 Add support for putting constructors and destructos in explicit comdats.
5ce1cbc [sphinx cleanup] Fix warning introduced by r211098.
946e17d Driver: use range based for loop
6c04d1d Reject a slightly-sneaky way to perform a read of mutable state from within a constexpr function. Part of this fix is a tentative fix for an as-yet-unfiled core issue (we're missing a prohibition against reading mutable members from unions via a trivial constructor/assignment, since that doesn't perform an lvalue-to-rvalue conversion on the members).
788bd00 Tests for DR581-600.
e2c70b3 PR19692: Add (passing) regression test.
745ac69 Unique_ptrify Preprocessor::PragmaHandlersBackup
bc357ac9 Objective-C. Prevents a crash generating AST for a a property assignment due to numerous user errors. Cannot come up with a reasonable test case due to array of user errors before the crash point. rdar://17813651.
fe43cf0 Major rewrite of linking strategy for sanitizer runtimes on Linux.
7e1d05f Reduce code duplication a bit more. NFC.
313ac76 Reduce code duplication a bit more. NFC.
87db5ae Simplify the code a bit, NFC.
0433216 Move emitCXXStructor to CGCXXABI.
948514b Create a emitCXXStructor function and make the existing emitCXXConstructor and emitCXXDestructor static helpers.
41e574e Use intrusive refcounted pointers to manage RopeRefCountString lifetime.
c447b36 unique_ptrify ChainedDiagnosticConsumer's ctor parameters
5e1e7a9 Teach Clang how to use response files when calling other tools
132299d Fix memory leak of raw_ostreams in LogDiagnosticPrinter handling.
693214b Add -fseh-exceptions for MinGW-w64
085efff Pretty print attributes associated with record declarations.
57129e5 Objective-C SDK modernizer. Do not modernize an enum which already has the underlying interger type specification. // rdar://1826225
6eb5757 Adding some FIXMEs to the attribute emitter code regarding whether pretty printing enumerators should use quoted string literals, or identifiers. NFC.

git-subtree-dir: llvm/tools/clang
git-subtree-split: 702863c43da79c158db2162a9ba5901797050aea
Merge with Clang.
Squashed 'llvm/tools/lldb/' changes from 9f07825..5ca74eb

5ca74eb Moved PlatformDarwin::GetEnvironment() to PlatformPOSIX to fix Linux/llgs issue.
139f8bf The beginnings of a gtest-based test framework.
2212f04 Add an explicit cast to silence compiler warning here
4c920f5 Change inline-breakpoint-strategy setting to default to eInlineBreakpointsAlways strategy.
c6b6dac These APIs were defined in the .h file, but never actually implemented. Just get rid of them
b1d2e26 Adjust to LLVM JIT API change
d4a398c Fix up the HostThread interface, making the interface simpler.
dbfe39e Add ASan history threads into process_sp->GetExtendedThreadList, so they don't get freed too early
3e78507 android: add a command script to help display mixed Java/native backtraces.
084dadb ConnectionFileDescriptor::Connect()'s handling of the "fd://" method was broken in r214984 by the addition of an unconditional error return at the start of the code block handling this method.  Remove the errant lines. <rdar://problem/18416691>
afb4ceb Played around with TK UI a bit this weekend.
51b6026 Enable libcxx map test on FreeBSD again
cc7ffbc Fix lldb-gdbserver build.
6b0758a Have CommandObject::CheckRequirements() report the largest missing requirement for a command instead of the smallest.  e.g. if a command requires a Target, Process, Thread, and Frame, and none of those are available, report the largest -- Target -- as being missing instead of the smallest -- Frame.
c9f0532 Fix a thinko in how the RemoteiOS Platform looked up files in the SDK & other platform locations.  We didn't always do an exhaustive search through all the platform locations, so we would have to read some files out of memory even though they existed in the exploded shared cache or SDK.
85fb199 We had to squirrel away the dyld module before doing ResolveExecutableModule, since that would clear the module list, and then put it back by hand.  But we forgot to also put its sections back in the target SectionList, so we would jettison it as unloaded when we finished handling the first real load event.  Add its sections.
2ce7760 Make sure to #include <atomic> when using std::atomic.
745b8f1 Fix for 218140 for SBTarget.i, the added functions were in the wrong class definition
2b06bb9 Test suite runs better again after recent fixes that would select a platform if a "file a.out" auto selected a different platform than the selected one.
aaf505c Adds two new functions to SBTarget FindGlobalVariables and FindGlobalFunctions that lets you search by name, by regular expression and by starts with.
9c37b30 Fix typo in Linux ASLR logging.
369ad33 Extend the member function discovery APIs to also support Objective-C as well as C++
6ef7a90 Add some tests to be skipped when run remotely and also fixed a test to be more reliable when it comes to stopping on a specific line.
62d1ed2 llgs: removed some wait-for-stop code in inferior process launch pipeline.
1311d56 Fix the ability of "lldb-platform" to upload files.
d4965ae Hex encode the triple values in case they contain special characters.
35043b8 Add better logging for the "$vFile:pwrite:" packet so we can show binary data instead of nothing or unprintable characters. This can easily be extended for other packets that have binary data.
d8d8980 Listen to the return value of the Platform::WriteFile() call within PlatformPOSIX::PutFile() in case we write less than we wanted to. Also adjust the input stream's offset in such cases.
c3232de Retry remote connection one time in case of timeout and return an error that specifies why debugging failed.
885b8b4 If a new platform is created/selected for an architecture, make it the selected platform so you can do things like: % lldb ios-executable (lldb) platform connect connect://localhost:11111
50e0580 Build lldb-mi on all platforms with Makefile builds
4dc19e0 More categories could be added, and having an explicit list in this test case is a fairly bullet-proof recipe for disaster. Use the * enabling feature to workaround this. Fixes rdar://18358649
54a2d4c Fixed an issue where the last N load commands in the mach-o core file would not be read in where N was the number of LC_THREAD load commands.
c079b17 Unused functions break the -Werror build. Revert for now.
e5c8d9f Add a convenience function to FormatManager to setup an empty filter (one that suppresses all children, that is)
446329f Change the ClangASTMap implementation to use a thread-safe wrapper over llvm::DenseMap. This helps avoid a certain class of spins per <rdar://problem/18160764>
ea2c488 Clean-up warnings on Linux/GCC
0b36b8a Continuation broken for Python scripts when using non-interactive input (Xcode for example).
903f0a5 ELF: store the thumbness of a function in symbol flags.
83b5519 Change SBType.GetMemberFunctionAtIndex() to return an object describing the member function in more detail. A type was really quite vague. This now has function name, kind, as well as function type
0a112e6 use std::atomic<> to protect variables being accessed by multiple threads
f687f9c Fix JITLoaderGDB for 64-bit host and 32-bit target
7ccf639 Add a --help (-h) option to "command script add" that enables users to define a one-liner short help for their command
e4bdd7b lldb fix ARM64 register access - llgs side
7470655 Handle ARM ELF symbols properly: skip $t* and $a* symbols in ObjectFileELF.

git-subtree-dir: llvm/tools/lldb
git-subtree-split: 5ca74eb7220aecdd6d3fd7b0fbaf4606f6578cb7
Merge commit '0e6806317a9179be8a10c5329df0ae3b4ecb6fc7' into devel