compiler/arm/memory: VOPs SLOT-REF and SLOT-SET.

  * These are two VOPs (cribbed from the PPC backend) used for
access to object slots where the slot offset is known at build-the
compiler time.
compiler/arm/cell: Closure access and initialization VOPs.

  * VOPs CLOSURE-REF, CLOSURE-INIT, and CLOSURE-INIT-FROM-FP, all
cribbed from the PPC backend.  Two of these require the SLOT-REF
and SLOT-SET VOPs just committed, while the third is for stack
allocated closure value cells (which we don't currently support,
but it completes this set of VOPs and is easy enough to add).
compiler/ir2tran: Re-enable the various bits for now-defined CLOSURE VOPs.

  * These are the various bits required for the most basic support
for closures.  Specifically, these do not support D-X allocation
of closures, nor do they support value cells in any way (immutable
closures only).
arm-bootstrap.lisp: Switch to test case for closure allocation.

  * This is a fairly basic test for setting up and calling an
immutable closure.
compiler/arm/alloc: VOP MAKE-VALUE-CELL.

  * Cribbed from the PPC backend, modulo the changes required for
ARM heap allocation.
compiler/arm/cell: VOPs VALUE-CELL-REF and VALUE-CELL-SET.

  * Cribbed verbatim from the PPC backend.
compiler/ir2tran: Re-enable the bits dealing with value-cells.

  * Now that we have MAKE-VALUE-CELL, VALUE-CELL-REF, and
VALUE-CELL-SET, re-enable the various bits of IR2TRAN that use
them and don't depend on other bits that we don't have (such as,
specifically, UNWIND).
compilar/arm/insts: Fix LDR of memory at a label.

  * A simple bug when originally implementing the assembler, using
TN-OFFSET of a LABEL instead of using PC-OFFSET (since labels are
PC-relative) as the base register offset.  Fix, by using PC-OFFSET.
Basic support for FIXUPs on ARM.

  * ARM can only handle 8 bits of immediate at a time, which gives
some not-particularly-nice instruction sequences.  If we must, we
can use such sequences, but the more commonly done thing is to use
a PC-relative data load in order to read up a full word at a time.

  * In order to support said typical ARM constant load scenario
for fixups, teach the WORD pseudo-instruction about fixups, and
teach genesis about ABSOLUTE fixups for ARM.
compiler/arm/vm: Provide a random constant TN for reg_LR.

  * We need the link register for very little, but one of those
things is assembly-routines with ":RAW" calling conventions.
assembly/arm/support: Partial assembly-routine call/return support.

  * Cribbed (quite obviously) from the PPC backend, VM support
routines for assembly-routine call / return sequences, covering
the :NONE and :RAW call options (we don't need :FULL-CALL yet, and
it happens to be significantly more complex, so leave it for later).
compiler/arm/macros: Enable predication for {LOAD,STORE}-SYMBOL-VALUE.

  * These are the last of the macros that we currently have that
seem suitable for predication.
build-order.lisp-expr: Enable building assemfiles on ARM.

  * We're still in early bootstrap, but we're at the point where
we need assem-rtns.  Fortunately, only as an assemfile.

  * Enable building all of the assemfiles as assemfiles during
arm-bootstrap cross-compilation.  It does no harm, and will do
quite a bit of good going forwards.
compiler/arm/nlx: Use R8 instead of OCFP for NLX value passing.

  * The traditional place might be OCFP, but UNWIND needs to both
hold the NLX value start location (which we're adjusting here) and
emit an error trap (which requires OCFP).  R8 is available, so use
that.
assembly/arm/assem-rtns: The UNWIND routine.

  * The next major piece of NLX magic, based on the PPC version,
is actually being able to unwind the stack.
compiler/arm/nlx: VOP MAKE-UNWIND-BLOCK.

  * An "unwind block" is used for "lexical" non-local exit, which
means TAGBODY/GO or BLOCK/RETURN-FROM, not UNWIND-PROTECT or
CATCH/THROW.

  * Implementation based on the PPC version.
compiler/arm/values: VOP PUSH-VALUES.

  * This VOP is used when dealing with a known set of values that
need to be treated as a group (thus, "multiple-value-lvar" or
"unknown-values" convention).  Specifically, it converts from a
set of single-value TNs to the START TN and COUNT TN pair of a
multiple-value LVAR, storing the values of the input TNs on the
stack.
compiler/ir2tran: Re-enable bits corresponding to recently defined VOPs.

  * This is mainly NLX and multiple-value magic.
arm-bootstrap: Test case for lexical non-local exit.

  * Not much to see here, just recording the change in test cases.
compiler/arm/arith: Base conditional VOPs, /FIXNUM and -C/FIXNUM variants.

  * Cribbed from the SPARC backend, for a novelty, sans the ZERO
storage-class, and modulo the constant type for the -C/FIXNUM VOP.