Restarted X86 disassembling.
X86: Changed responsibility of generating string representation of instructions.
X86: Changed responsibility of generating string representation of instructions.
X86: Implemented PUSH (0x8B).
Work on disp and mod-reg-r/m parsing.
X86: Support the case of a single disp with no reg, and implemented opcode FF.
Implemented opcode E8 (call rel32) and fixed formatting of disp.
Implemented Instruction::reverse() and opcode 8D: MOV (r/m16/32 r16/32).
Implemented imm8 and opcode 83.
Implemented opcode 58: POP.
Implemented imm32 and opcode C7: MOV.
Implemented opcode E9: JMP.
Implemented opcode C3: RETN.
Implemented opcode 90: NOP.
Fixed SIP string representation.
Fixed Imm string rep and implemented opcode 81.
Fixed get strings where the opposite type is smaller than and so '(reg)' is added for address referencing, implemented opcode 8A: MOV.
Implemented opcode 8A: MOV.
Implemented opcode A8: TEST.
Started two-byte instruction support: implemented opcode 85: JNE/JNZ.