Fix interference caused by fmul 2, x -> fadd x, x

If an fmul was introduced by lowering, it wouldn't be folded
into a multiply by a constant since the earlier combine would
have replaced the fmul with the fadd.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216932 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Add failing testcase.

This is broken when 64-bit add is only partially
moved to the VALU.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216933 91177308-0d34-0410-b5e6-96231b3b80d8
Add note to documentation about machine node chains.

I've been assuming chain operands were always the first operand,
since the documentation says this. I was confused about why they
were missing after instruction selection. Apparently the convention
changes to using the last operand for MachineSDNodes and I've never
noticed before.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216934 91177308-0d34-0410-b5e6-96231b3b80d8
Add a note about AuroraUX to the release notes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216938 91177308-0d34-0410-b5e6-96231b3b80d8