Better ADC self-calibration for LPC11U6X & LPC15XX

Added logic to perform ADC self-calibration at 500kHz as per the LPC11U6X and LPC15XX user manuals. I also fixed the LPC11U6X sampling clock divider to actually divide by 1 (CLKDIV = 0) instead of 2 (CLKDIV = 1).
No, the comment was previous incorrect. Setting CLKDIV to 0 will divide by 1.