msm: mdss: support mdp prefill bandwith for multiple platforms

To calculate mdp prefill bandwidth, mdp driver needs to get h/w
dependent buffer constants from device tree. Also add h/w feature
dependent logic.

Conflicts:

	drivers/video/msm/mdss/mdss.h

Change-Id: I8d56ec502a6fd56eaae5b65a326ef966be46f14b
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
msm: mdss: reduce mdp prefill bandwidth vote for command mode panel

The current result of mdp prefill bandwidth calculation for command
mode is larger than what is actually needed for many use cases. This
is due to the fact that for command mode panels during prefill time,
there are less buffer prefill requirement or time constraint than that
of video panels. This patch makes adjustment accordingly based on the
updated equations by h/w team.

Change-Id: I06935a29d771202b3f8dc2c62cf948a8ecc81481
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
msm: mdss: calculate prefill bandwidth using the worst case vbp

The blanking period of a panel is determined by vbp factor: vertical
back porch plus vsync pulse width. The larger vbp, the larger blanking
time, and the smaller prefill bandwidth request. When two or more
types of interfaces/panels are involved, although each panel has its
own vbp, there is an option to calculate the prefill bandwidth for
each panel with the worst case vbp of all panels. This way there is no
need to increase fudge factor to avoid underruns.

Change-Id: I60dda6ad41bbb353c58ef93cf97787c4da3929dc
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
msm: mdss: Fix for bus bandwidth issue

Fixing possible large values handling.

Change-Id: Id9e4aafa2a922c2c90def037b110826344487fcd
Signed-off-by: Radhika Ranjan Soni <rrsoni@codeaurora.org>
msm: mdss: add tile format condition for prefill bytes calculation

Latency buffer requires more lines to be prefilled for use cases that
supports tile format.

Change-Id: I552bade677822d47cdd5b43c01f795552e94b406
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
msm: mdss: release mdp bandwidth voting for command mode when idle

There is no bandwidth usage for command mode panel if no new commit
comes, so mdp bandwidth request can be zero as soon as data transfer
to panel is done. This could bring power savings for use cases of
short transfer time relatively to long idle time (duty cycle) such as
partial update, and slow fps. When video mode panel is present, this
bandwidth cannot be released since the timing of this release is
unpredictable.

Change-Id: Ia67143aa421b7b8d8b1f359244dd397dab369b4a
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>

Conflicts:
	drivers/video/msm/mdss/mdss_mdp.h
msm: mdss: update latency buffer bytes calculation for prefill bandwidth

This is a s/w change to reflect the new h/w update of latency buffer
byte calculation for prefill bandwidth. Previously this number of
latency buffer bytes is the amount of allocated smp bytes, however,
for some use cases this doesn't not match the bandwidth equation
result. So for the purpose of matching mdp prefill bandwidth
equations, a standalone calculation is needed.

Change-Id: Ic74599d2c2bfe9610ebc22dee137a0df7171dcb5
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
msm: mdss: Update wr mem fields with correct names

wr mem start and continue were incorrectly named in
the documentation and dtsi files. Changing the names
to wr-mem-start and wr-mem-continue to more accurately
reflect the fields.

Change-Id: If2cdd410fd50a4690dcb6c87cb0b9f4818848848
CRs-Fixed: 578028
Signed-off-by: Casey Piper <cpiper@codeaurora.org>

Conflicts:
	arch/arm/boot/dts/dsi-panel-truly-wvga-cmd.dtsi
msm: mdss: Do not program DSI PLL registers from DSI controller

MDSS DSI driver currently programs certain DSI PLL registers as
part of the DSI PHY off sequence. This is incorrect and could
lead to some unexpected errors such as DSI PLL getting turned off
while the branch clocks are still on. Fix this by removing all
such register programming.

Change-Id: Ie1e88cd18de6b8ef8804f7a2b34b8b8282166c96
CRs-Fixed: 509801
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
msm: mdss: dsi-1 as master clock controller at split display case

During split display case, both dsi controllers share the same
dsi pll(dsi0) dsi-0 clock need to be enabled before dsi-1 and disabled
in the reverse order. This mechanism helps using a unified clock control
logic.

Change-Id: I9fe0095b0427c9c2b7fd84c3179bc8364049cce4
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>

Conflicts:
	drivers/video/msm/mdss/mdss_dsi_host.c
msm: mdss: parse dual DSI config from kernel cmd line

Update DSI panel configuration API to parse the
dual DSI configuration passed from kernel command
line.

Change-Id: I1a6f65a5ea385df46db2d81dcedc24c192ce1388
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>

Conflicts:
	drivers/video/msm/mdss/mdss_dsi.c
msm: mdss: Fix clk warnings for esc clk with dual-dsi panels

In current implementation if dual-dsi panel's continuous splash screen
feature is enabled then feature flag is disabled only for master and
not for secondary panel. This leads to clk prepare without clk set rate.
For esc clk this leads to clk warning back-trace in the logs. For other
clocks, if clk rate changes between suspend/resume then it will lead to
rate incorrect programming and unknown behaviour. Fix this by disabling
secondary panel's feature flag.

Change-Id: I09fd3968c4eecc97a9f07e2c731e6ccce8036119
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
ARM: dts: msm: change mdp bandwidth default fudge factors

Tune default bandwidth fudge factors to smaller values because mdp
driver implements bandwidth calculation equations.

Change-Id: Iba078ab55748c430238a2da58b88b93387f8b62d
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
ARM: dts: msm: remove mdss-high-ib-factor

This factor was used to increase mdp bandwidth request and now it is
not needed any more after mdp driver implemented bandwidth calculation
equations.

Change-Id: I94c4f2499eb09a2db268a3db55bf7172a96315b5
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
mdss:display: add regulator control to dsi-1

Regulators are shared by both dsi controller. For both
dual and split display application regulator should be
controlled individually to avoid reualtors are turned off
while dsi-1 still running which cause DLB0_ERR_CONTENTION_LP1
error.

CRs-fixed: 579900
Change-Id: Ia29bd3e49a405ccb1ad55f08f3897cee2ff6f4c6
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
msm: mdss: synchronize wfd driver iommu mmap/munmap with mdss

Add clocks reference during wfd driver iommu mdp_mmap/mdp_munmap
to ensure iommu is in proper state while wfd driver map/un-map
any buffers.

Change-Id: Id1a24285b81d5047e5e9f002ade9694ea49be59d
Signed-off-by: Pawan Kumar <pavaku@codeaurora.org>
lockdep: remove task argument from debug_check_no_locks_held

The only existing caller to debug_check_no_locks_held calls it
with 'current' as the task, and the freezer needs to call
debug_check_no_locks_held but doesn't already have a current
task pointer, so remove the argument.  It is already assuming
that the current task is relevant by dumping the current stack
trace as part of the warning.

This was originally part of 6aa9707099c (lockdep: check that
no locks held at freeze time) which was reverted in
dbf520a9d7d4.

Change-Id: Idbaf1332ce6c80dc49c1d31c324c7fbf210657c5
Original-author: Mandeep Singh Baines <msb@chromium.org>
Acked-by: Pavel Machek <pavel@ucw.cz>
Acked-by: Tejun Heo <tj@kernel.org>
Signed-off-by: Colin Cross <ccross@android.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

Conflicts:
	kernel/exit.c