Use .data() instead of &x[0]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205722 91177308-0d34-0410-b5e6-96231b3b80d8
Use std::swap

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205723 91177308-0d34-0410-b5e6-96231b3b80d8
When a CHECK-NEXT fails because there was no match on the next line, include
the non-matching next line in the diagnostic to make the problem more obvious.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205725 91177308-0d34-0410-b5e6-96231b3b80d8
Remove an unused file.

Using this file would result in an odr violation: it defines an llvm::Interval
class that conflicts with the one in Analysis/Interval.h.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205726 91177308-0d34-0410-b5e6-96231b3b80d8
R600: Replace dyn_cast + assert with cast

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205730 91177308-0d34-0410-b5e6-96231b3b80d8
R600: Match 24-bit arithmetic patterns in a Target DAGCombine

Moving these patterns from TableGen files to PerformDAGCombine()
should allow us to generate better code by eliminating unnecessary
shifts and extensions earlier.

This also fixes a bug where the MAD pattern was calling
SimplifyDemandedBits with a 24-bit mask on the first operand
even when the full pattern wasn't being matched.  This occasionally
resulted in some instructions being incorrectly deleted from the
program.

v2:
  - Fix bug with 64-bit mul

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205731 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Handle INSERT_SUBREG in SIFixSGPRCopies

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205732 91177308-0d34-0410-b5e6-96231b3b80d8
Put a limit on ScheduleDAGSDNodes::ClusterNeighboringLoads to avoid blowing up compile time.

Fixes PR16365 - Extremely slow compilation in -O1 and -O2.

The SD scheduler has a quadratic implementation of load clustering
which absolutely blows up compile time for large blocks with constant
pool loads. The MI scheduler has a better implementation of load
clustering. However, we have not done the work yet to completely
eliminate the SD scheduler. Some benchmarks still seem to benefit from
early load clustering, although maybe by chance.

As an intermediate term fix, I just put a nice limit on the number of
DAG users to search before finding a match. With this limit there are no
binary differences in the LLVM test suite, and the PR16365 test case
does not suffer any compile time impact from this routine.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205738 91177308-0d34-0410-b5e6-96231b3b80d8
Reverting commit r205628 due to mips64 issues.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205741 91177308-0d34-0410-b5e6-96231b3b80d8
[docs] Fix some Sphinx warnings that have crept in.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205742 91177308-0d34-0410-b5e6-96231b3b80d8
[docs] Update link title

docs/TableGen/ is not really just "fundamentals" anymore, but rather
more of a portal for all things TableGen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205743 91177308-0d34-0410-b5e6-96231b3b80d8
[docs] Fix some links

The TableGen docs have changed structure

Patch by Tay Ray Chuan!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205744 91177308-0d34-0410-b5e6-96231b3b80d8
obj2yaml: Use the correct relocation type for different machine types

The IO normalizer would essentially lump I386 and AMD64 relocations
together.  Relocation types with the same numeric value would then get
mapped in appropriately.

For example:
IMAGE_REL_AMD64_ADDR64 and IMAGE_REL_I386_DIR16 both have a numeric
value of one.  We would see IMAGE_REL_I386_DIR16 in obj2yaml conversions
of object files with a machine type of IMAGE_FILE_MACHINE_AMD64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205746 91177308-0d34-0410-b5e6-96231b3b80d8
ARM64: Clean up file header comment a bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205747 91177308-0d34-0410-b5e6-96231b3b80d8
ARM64: Range based for loop in ARM64PromoteConstant pass

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205748 91177308-0d34-0410-b5e6-96231b3b80d8
Tidy up comments a bit.

Punctuation, grammar, formatting, etc..

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205749 91177308-0d34-0410-b5e6-96231b3b80d8
X86: Split the relocation selection up

Before, we would have conditional operators where one side of the
operator would be of type RelocationTypeAMD64 and the other is of type
RelocationTypeI386.  GCC would noisly warn with -Wenum-compare
diagnostic.

Instead, refactor the code so it is more like the X86 ELF object writer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205752 91177308-0d34-0410-b5e6-96231b3b80d8
Fix a (legacy) PassManager crash that occurs when a ModulePass
indirectly requires a function analysis.

This bug was reported by Jason Kim. He included a test case here:
http://reviews.llvm.org/D3312

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205753 91177308-0d34-0410-b5e6-96231b3b80d8
AVX-512: Added fp_to_uint and uint_to_fp patterns.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205754 91177308-0d34-0410-b5e6-96231b3b80d8
The LLVM C API shouldn't be including a file from the C++ API. Especially not a
file that it doesn't use.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205755 91177308-0d34-0410-b5e6-96231b3b80d8