rtl/cache: generate m_access from combinational logic.

We don't want m_access high at the end of a line fill when m_ack is high
or else we'll be starting a new transaction and this can confuse things
somewhat.
rtl/timer: run the timer in periodic mode.
tests: run all tests in both single step and running where possible.

For each test, run by single stepping the CPU and also running to the
next breakpoint.  This is useful for making sure that there aren't odd
timing problems that can be hidden by single-stepping or free-running
but not the other mode.