nv50: don't leak heap on tls alloc failure

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
nv50/ir: fix PFETCH and add RDSV to get VSTRIDE for GPs
nv50/ir: delay calculation of indirect addresses

Instead of emitting an SHL 4 io an address register on the TGSI ARL and UARL
instructions, emit the shift when the loaded address is actually used.  This
is necessary because input vertex and attribute indices in geometry shaders on
nv50 need to be shifted left by 2 instead of 4.

Signed-off-by: Bryan Cain <bryancain3@gmail.com>
[calim: various updates to the indirect address logic]
Signed-off-by: Christoph Bumiller <christoph.bumiller@speed.at>
[imirkin: remove OP_MAD change that calim made, add OP_RESTART handling
          same as OP_EMIT for code flow analysis]
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
nv50: add support for geometry shaders

Layer output probably doesn't work yet, but other than that everything seems
to be working.

Signed-off-by: Bryan Cain <bryancain3@gmail.com>
[calim: fix up minor bugs, code formatting]
Signed-off-by: Christoph Bumiller <christoph.bumiller@speed.at>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
nv50: allow vert_count to be >255
nv50/ir: disallow predicates on emit/restart ops
nv50/ir: disallow shader input propagation for gp

For some reason, shader input accesses don't work correctly in non-ld
instructions. Disallow those loads from being propagated.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
nv50/ir: comment out code to allow input/immed loads

This code was missing a break which made it ineffective. But since
shader input loads have been disallowed, define the code out.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
nv50/ir: add support for gl_PrimitiveIDIn

Note that the primitive id is stored in a[0x18], while usually the
geometry instructions are of the form a[$a1 + 0x4] which gets mapped to
p[] space. We need to avoid the change from a[] to p[] here, so it's
keyed on whether the access is indirect or not.

Note that there's also a use-case for accessing e.g. a[$r1], however
that's not supported for now. (Could be added by checking the register
file of the indirect parameter.)

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
nv50: properly set the PRIMITIVE_ID enable flag when it is a gp input.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
nv50: VP_RESULT_MAP_SIZE has to be positive

Make sure that we never try to use a 0-sized map. This can happen when
using a gp, so add a dummy mapping when computing vp_gp_mapping in that
case.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
nv50: GP_REG_ALLOC_RESULT must be positive

Set max_out to 1 when there are no outputs.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
nv50: pad GP code up to 0x400

Otherwise we get trapped reads at the end of the code page, since the GP
is the last entry on the code bo. Perhaps all of the shader types need
this, but this solves the GP problem now.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
nv50: report glsl 1.50 now that gp tests pass

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
nv50: enable seamless cube maps/multisample textures for OpenGL 3.2

Some of the hardware support is missing. The NVIDIA-provided driver,
which claims 3.3 support fails a slew of the relevant tests as well.
This allows us to expose geometry shaders without doing the additional
work involved in supporting ARB_geometry_shader4.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>